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Searched refs:DMA0_X_MODIFY (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h236 #define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register */ macro
DcdefBF532.h148 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
149 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY,val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h254 #define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register */ macro
DcdefBF51x_base.h443 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
444 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h254 #define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register */ macro
DcdefBF52x_base.h443 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
444 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h232 #define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register … macro
DcdefBF534.h405 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
406 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h234 #define DMA0_X_MODIFY 0xffc00c14 /* DMA Channel 0 X Modify Register */ macro
DcdefBF54x_base.h343 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
344 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h251 #define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register */ macro
DcdefBF538.h526 #define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
527 #define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)