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Searched refs:DMA10_CURR_ADDR (Results 1 – 10 of 10) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h398 #define DMA10_CURR_ADDR 0xFFC00EA4 /* DMA Channel 10 Current Address Register */ macro
DcdefBF51x_base.h719 #define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
720 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h398 #define DMA10_CURR_ADDR 0xFFC00EA4 /* DMA Channel 10 Current Address Register */ macro
DcdefBF52x_base.h719 #define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
720 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h376 #define DMA10_CURR_ADDR 0xFFC00EA4 /* DMA Channel 10 Current Address Register … macro
DcdefBF534.h681 #define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
682 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h398 #define DMA10_CURR_ADDR 0xffc00ea4 /* DMA Channel 10 Current Address Register */ macro
DcdefBF54x_base.h641 #define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
642 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h526 #define DMA10_CURR_ADDR 0xFFC01CA4 /* DMA Channel 10 Current Address Register */ macro
DcdefBF538.h798 #define bfin_read_DMA10_CURR_ADDR() bfin_readPTR(DMA10_CURR_ADDR)
799 #define bfin_write_DMA10_CURR_ADDR(val) bfin_writePTR(DMA10_CURR_ADDR, val)