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Searched refs:DMA1_Y_MODIFY (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h251 #define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register */ macro
DcdefBF532.h177 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
178 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY,val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h270 #define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register */ macro
DcdefBF51x_base.h472 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
473 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h270 #define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register */ macro
DcdefBF52x_base.h472 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
473 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h248 #define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register … macro
DcdefBF534.h434 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
435 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h252 #define DMA1_Y_MODIFY 0xffc00c5c /* DMA Channel 1 Y Modify Register */ macro
DcdefBF54x_base.h376 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
377 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h267 #define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register */ macro
DcdefBF538.h556 #define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
557 #define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)