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Searched refs:DMA2_CURR_ADDR (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h267 #define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register */ macro
DcdefBF532.h208 #define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
209 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR,val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h286 #define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register */ macro
DcdefBF51x_base.h503 #define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
504 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h286 #define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register */ macro
DcdefBF52x_base.h503 #define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
504 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h264 #define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register … macro
DcdefBF534.h465 #define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
466 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h270 #define DMA2_CURR_ADDR 0xffc00ca4 /* DMA Channel 2 Current Address Register */ macro
DcdefBF54x_base.h409 #define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
410 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h283 #define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register */ macro
DcdefBF538.h586 #define bfin_read_DMA2_CURR_ADDR() bfin_readPTR(DMA2_CURR_ADDR)
587 #define bfin_write_DMA2_CURR_ADDR(val) bfin_writePTR(DMA2_CURR_ADDR, val)