Home
last modified time | relevance | path

Searched refs:DMA4_CURR_ADDR (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h295 #define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register */ macro
DcdefBF532.h262 #define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
263 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR,val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h314 #define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register */ macro
DcdefBF51x_base.h557 #define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
558 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h314 #define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register */ macro
DcdefBF52x_base.h557 #define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
558 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h292 #define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register … macro
DcdefBF534.h519 #define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
520 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h302 #define DMA4_CURR_ADDR 0xffc00d24 /* DMA Channel 4 Current Address Register */ macro
DcdefBF54x_base.h467 #define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
468 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h311 #define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register */ macro
DcdefBF538.h638 #define bfin_read_DMA4_CURR_ADDR() bfin_readPTR(DMA4_CURR_ADDR)
639 #define bfin_write_DMA4_CURR_ADDR(val) bfin_writePTR(DMA4_CURR_ADDR, val)