| /arch/sh/drivers/dma/ |
| D | Kconfig | 7 bool "SuperH on-chip DMA controller (DMAC) support"
21 DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
30 to the number of channels that the on-chip DMAC has.
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| /arch/sh/kernel/cpu/sh3/ |
| D | setup-sh7705.c | 36 RTC, TMU2, DMAC, USB, SCIF2, SCIF0, enumerator
63 INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
74 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
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| D | setup-sh770x.c | 39 RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0, enumerator
78 INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
92 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
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| /arch/sh/kernel/cpu/sh4/ |
| D | setup-sh7750.c | 104 DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF, enumerator
132 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
154 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
174 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
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| D | setup-sh7760.c | 44 DMAC, DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, TMU2, REF, enumerator
83 INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
115 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
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| /arch/sh/kernel/cpu/sh4a/ |
| D | setup-sh7763.c | 176 TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5, enumerator
227 INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
244 PCIINTA, PCISERR, HAC, CMT, 0, 0, 0, DMAC,
258 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC, ADC } },
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| /arch/frv/kernel/ |
| D | cmode.S | 83 # (3) Stop the transfer function of DMAC. Stop all the bus masters
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| D | sleep.S | 141 # Stop DMAC transfer
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| /arch/arm/mach-realview/ |
| D | realview_pba8.c | 171 AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
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| D | realview_pb11mp.c | 180 AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
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| D | realview_eb.c | 188 AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
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| /arch/arm/mach-versatile/ |
| D | core.c | 754 AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
|