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Searched refs:EBIU_DDRBWC1 (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h206 #define EBIU_DDRBWC1 0xffc00a84 /* DDR Bank1 Write Count Register */ macro
DcdefBF54x_base.h293 #define bfin_read_EBIU_DDRBWC1() bfin_read32(EBIU_DDRBWC1)
294 #define bfin_write_EBIU_DDRBWC1(val) bfin_write32(EBIU_DDRBWC1, val)