Searched refs:EPC_1 (Results 1 – 3 of 3) sorted by relevance
/arch/xtensa/include/asm/ |
D | regs.h | 51 #define EPC_1 177 macro
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/arch/xtensa/kernel/ |
D | entry.S | 606 wsr a2, EPC_1 660 wsr a2, EPC_1 807 rsr a4, EPC_1 # get exception address 854 wsr a4, EPC_1 # save new epc_1 955 rsr a0, EPC_1 957 wsr a0, EPC_1 972 rsr a0, EPC_1 974 wsr a0, EPC_1 1619 rsr a3, EPC_1 1636 rsr a3, EPC_1
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D | align.S | 200 rsr a7, EPC_1 # load exception address 287 1: wsr a7, EPC_1 # skip load instruction 367 1: wsr a7, EPC_1 # skip store instruction
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