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Searched refs:FPU_CSR_COND6 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/
Dmipsregs.h134 #define FPU_CSR_COND6 0x40000000 /* $fcc6 */ macro
/arch/mips/math-emu/
Dcp1emu.c102 FPU_CSR_COND6,