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Searched refs:IE_IRQ2 (Results 1 – 6 of 6) sorted by relevance

/arch/mips/jazz/
Dirq.c89 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1); in arch_init_irq()
100 } else if (pending & IE_IRQ2) { in plat_irq_dispatch()
/arch/mips/include/asm/sn/sn0/
Dip27.h55 #define SRB_TIMOCLK IE_IRQ2 /* 0x1000 */
/arch/mips/sgi-ip32/
Dip32-irq.c477 else if (unlikely(pending & IE_IRQ2)) in plat_irq_dispatch()
530 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) in arch_init_irq()
/arch/mips/nxp/pnx833x/common/
Dinterrupts.c344 write_c0_status(read_c0_status() | IE_IRQ2); in arch_init_irq()
/arch/mips/alchemy/common/
Dirq.c610 set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3); in arch_init_irq()
/arch/mips/include/asm/
Dmipsregs.h233 #define IE_IRQ2 (_ULCAST_(1) << 12) macro