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Searched refs:INTENABLE (Results 1 – 4 of 4) sorted by relevance

/arch/xtensa/kernel/
Dirq.c126 set_sr (cached_irq_mask, INTENABLE); in xtensa_irq_mask()
132 set_sr (cached_irq_mask, INTENABLE); in xtensa_irq_unmask()
Dhead.S117 wsr a0, INTENABLE
Dtraps.c204 unsigned long intenable = get_sr (INTENABLE); in do_interrupt()
/arch/xtensa/include/asm/
Dregs.h58 #define INTENABLE 228 macro