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Searched refs:MV_WRITE (Results 1 – 1 of 1) sorted by relevance

/arch/powerpc/platforms/chrp/
Dpegasos_eth.c124 #define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset) macro
144 MV_WRITE(MV64340_SRAM_CONFIG, 0); in Enable_SRAM()
146 MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16); in Enable_SRAM()
150 MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong); in Enable_SRAM()
154 MV_WRITE(MV643XX_ETH_BAR_4, ALong); in Enable_SRAM()
156 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); in Enable_SRAM()
160 MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong); in Enable_SRAM()