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Searched refs:M_DM_DSCR_BASE_RESET (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/sibyte/
Dsb1250_dma.h412 #define M_DM_DSCR_BASE_RESET _SB_MAKEMASK1(61) /* write register */ macro
/arch/mips/mm/
Dpage.c635 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); in sb1_dma_init()