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Searched refs:OCTEON_IRQ_MBOX0 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/cavium-octeon/
Dsmp.c156 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED, in octeon_prepare_cpus()
/arch/mips/include/asm/mach-cavium-octeon/
Dirq.h74 #define OCTEON_IRQ_MBOX0 56 macro