Searched refs:OMAP_IH1_BASE (Results 1 – 3 of 3) sorted by relevance
| /arch/arm/plat-omap/include/mach/ |
| D | hardware.h | 152 #define OMAP_IH1_BASE 0xfffecb00 macro
155 #define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
156 #define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
157 #define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
158 #define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
159 #define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
160 #define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
161 #define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
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| D | entry-macro.S | 40 ldr \base, =IO_ADDRESS(OMAP_IH1_BASE)
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| /arch/arm/mach-omap1/ |
| D | irq.c | 78 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET); in omap_ack_irq()
142 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
150 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
154 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
162 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
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