Searched refs:OMAP_IH2_BASE (Results 1 – 3 of 3) sorted by relevance
/arch/arm/plat-omap/include/mach/ |
D | hardware.h | 153 #define OMAP_IH2_BASE 0xfffe0000 macro 163 #define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00) 164 #define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04) 165 #define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10) 166 #define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14) 167 #define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18) 168 #define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c) 169 #define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
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D | entry-macro.S | 52 ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE)
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/arch/arm/mach-omap1/ |
D | irq.c | 76 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET); in omap_ack_irq() 143 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, 144 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, 151 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed }, 155 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 }, 163 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, 164 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff }, 165 { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },
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