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Searched refs:PANIC (Results 1 – 4 of 4) sorted by relevance

/arch/parisc/include/asm/
Dperf.h56 #define PANIC 28 macro
/arch/mips/dec/
Dint-handler.S289 PANIC("Unimplemented cpu interrupt! CP0_CAUSE: 0x%08x");
293 PANIC("Unimplemented asic interrupt! ASIC ISR: 0x%08x");
/arch/parisc/kernel/
Dperf.c405 onyx_images[PANIC][15] &= 0xffffff00; /* clear last 2 bytes */ in perf_patch_images()
406 onyx_images[PANIC][15] |= (0x000000ff&((IVAaddress) >> 24)); /* set 2 bytes */ in perf_patch_images()
407 onyx_images[PANIC][16] = (IVAaddress << 8)&0xffffff00; in perf_patch_images()
/arch/mips/include/asm/
Dasm.h97 #define PANIC(msg) \ macro