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Searched refs:PBDR (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-clps711x/include/mach/
Dautcpu12.h68 #define AUTCPU12_SMC_PORT_OFFSET PBDR
/arch/arm/mach-l7200/include/mach/
Dgpio.h74 #define PBDR (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF)) macro
/arch/arm/include/asm/hardware/
Dclps7111.h38 #define PBDR (0x0001) macro
/arch/h8300/include/asm/
Dregs306x.h100 #define PBDR 0xFFFFDA macro
Dregs267x.h182 #define PBDR 0xFFFF6A macro