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Searched refs:PCIO_BASE (Results 1 – 14 of 14) sorted by relevance

/arch/arm/mach-s3c2410/include/mach/
Dio.h26 #define PCIO_BASE (S3C24XX_VA_ISA_WORD) macro
67 return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void __iomem *)port; in __ioaddr()
92 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port))); \
105 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \
120 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \
125 "r" (PCIO_BASE + ((port) & ~0xff)), \
131 "r" (PCIO_BASE + (port))); \
146 : "r" (PCIO_BASE), \
152 : "r" (PCIO_BASE + ((port) & ~0xff)), \
158 : "r" (PCIO_BASE + ((port)))); \
[all …]
/arch/arm/mach-rpc/include/mach/
Dio.h41 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outb()
54 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outw()
67 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) in __outl()
81 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
90 ret = PCIO_BASE; in __ioaddr()
117 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
130 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
144 : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
157 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
171 : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
[all …]
Dhardware.h58 #define PCIO_BASE IOMEM(0xe0010000) macro
/arch/arm/mach-shark/include/mach/
Dio.h14 #define PCIO_BASE 0xe0000000 macro
17 #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
/arch/arm/mach-footbridge/include/mach/
Dio.h18 #define PCIO_BASE 0xff000000 macro
25 #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
/arch/arm/mach-ixp23xx/include/mach/
Dhardware.h18 #define PCIO_BASE IXP23XX_PCI_IO_VIRT macro
/arch/arm/mach-h720x/include/mach/
Dhardware.h185 #define PCIO_BASE (0) /* for inb, outb and friends */ macro
186 #define PCIO_VIRT PCIO_BASE
/arch/arm/mach-integrator/include/mach/
Dhardware.h36 #define PCIO_BASE PCI_IO_VADDR macro
/arch/arm/mach-versatile/include/mach/
Dhardware.h39 #define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0
/arch/arm/mach-l7200/include/mach/
Dhardware.h55 #define PCIO_BASE IO_BASE macro
/arch/arm/mach-clps711x/include/mach/
Dhardware.h74 #define PCIO_BASE IO_BASE macro
/arch/arm/mach-pxa/include/mach/
Dhardware.h19 #define PCIO_BASE 0 macro
/arch/arm/mach-rpc/
Driscpc.c91 writeb(0xc, PCIO_BASE + (0x3f2 << 2)); in rpc_map_io()
/arch/arm/mach-footbridge/
Dcommon.c178 .virtual = PCIO_BASE,