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Searched refs:R_BCM1480_IMR_INTERRUPT_MASK_L (Results 1 – 2 of 2) sorted by relevance

/arch/mips/sibyte/bcm1480/
Dirq.c325 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_L))); in arch_init_irq()
/arch/mips/include/asm/sibyte/
Dbcm1480_regs.h402 #define R_BCM1480_IMR_INTERRUPT_MASK_L 0x1028 macro