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Searched refs:R_IMR_INTERRUPT_STATUS_BASE (Results 1 – 2 of 2) sorted by relevance

/arch/mips/sibyte/sb1250/
Dirq.c323 R_IMR_INTERRUPT_STATUS_BASE))); in dispatch_ip2()
/arch/mips/include/asm/sibyte/
Dsb1250_regs.h732 #define R_IMR_INTERRUPT_STATUS_BASE 0x0100 macro