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Searched refs:SIC_IAR0 (Results 1 – 15 of 15) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
Dblackfin.h54 #define SIC_IAR0 SICA_IAR0 macro
/arch/blackfin/mach-common/
Dints-priority.c113 bfin_read32((unsigned long *)SIC_IAR0 +
115 ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) {
117 bfin_read32((unsigned long *)SIC_IAR0 +
Ddpmc_modes.S326 PM_SYS_PUSH(SIC_IAR0)
797 PM_SYS_POP(SIC_IAR0)
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h70 #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ macro
DcdefBF532.h58 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
59 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h53 #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ macro
DcdefBF51x_base.h69 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
70 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h56 #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ macro
DcdefBF52x_base.h69 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
70 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h53 #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ macro
DcdefBF534.h63 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
64 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h71 #define SIC_IAR0 0xffc00130 /* System Interrupt Assignment Register 0 */ macro
DcdefBF54x_base.h91 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
92 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h74 #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ macro
DcdefBF538.h78 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
79 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)