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Searched refs:SIC_IMASK1 (Results 1 – 9 of 9) sorted by relevance

/arch/blackfin/mach-common/
Ddpmc_modes.S310 #ifdef SIC_IMASK1
311 PM_SYS_PUSH(SIC_IMASK1)
811 #ifdef SIC_IMASK1
812 PM_SYS_POP(SIC_IMASK1)
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h61 #define SIC_IMASK1 0xFFC0014C /* Interrupt Mask register of SIC2 */ macro
DcdefBF51x_base.h90 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
91 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h64 #define SIC_IMASK1 0xFFC0014C /* Interrupt Mask register of SIC2 */ macro
DcdefBF52x_base.h90 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
91 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
/arch/blackfin/mach-bf538/include/mach/
DcdefBF538.h62 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
63 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
64 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + x * (SIC_IMASK1 - SIC_IMASK0))
65 #define bfin_write_SIC_IMASK(x, val) bfin_write32(SIC_IMASK0 + x * (SIC_IMASK1 - SIC_IMASK0), val)
DdefBF539.h80 #define SIC_IMASK1 0xFFC00128 /* Interrupt Mask Register 1 */ macro
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h63 #define SIC_IMASK1 0xffc00110 /* System Interrupt Mask Register 1 */ macro
DcdefBF54x_base.h69 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
70 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)