Searched refs:SPORT1_RCLKDIV (Results 1 – 14 of 14) sorted by relevance
195 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */ macro
637 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)638 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV,val)
301 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */ macro
489 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)490 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV,val)
217 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */ macro
373 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)374 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)
215 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */ macro
195 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider … macro
337 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)338 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV,val)
159 #define SPORT1_RCLKDIV 0xffc00928 /* SPORT1 Receive Serial Clock Divider Regis… macro
208 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)209 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)
205 #define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */ macro
308 #define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)309 #define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)