Searched refs:SPRN_L2CR (Results 1 – 4 of 4) sorted by relevance
| /arch/powerpc/platforms/powermac/ |
| D | cache.S | 103 mfspr r5,SPRN_L2CR
109 1: mtspr SPRN_L2CR,r3
143 1: mtspr SPRN_L2CR,r5
155 mtspr SPRN_L2CR,r4
160 1: mfspr r3,SPRN_L2CR
167 mtspr SPRN_L2CR,r4
274 mfspr r3,SPRN_L2CR
281 1: mtspr SPRN_L2CR,r0 /* lock the L2 cache */
293 mtspr SPRN_L2CR,r0 /* set the hardware flush bit */
294 3: mfspr r0,SPRN_L2CR /* wait for it to go to 0 */
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| /arch/powerpc/kernel/ |
| D | l2cr_6xx.S | 134 mfspr r4,SPRN_L2CR
208 mtspr SPRN_L2CR,r3
221 mtspr SPRN_L2CR,r3
228 10: mfspr r3,SPRN_L2CR
235 3: mfspr r3,SPRN_L2CR
241 mtspr SPRN_L2CR,r3
250 mtspr SPRN_L2CR,r3
281 mfspr r3,SPRN_L2CR
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| D | cpu_setup_6xx.S | 258 mfspr r3,SPRN_L2CR
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| /arch/powerpc/include/asm/ |
| D | reg.h | 311 #define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ macro
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