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Searched refs:UART1_LCR (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
Dblackfin.h163 #define BFIN_UART_LCR UART1_LCR
DdefBF54x_base.h973 #define UART1_LCR 0xffc0200c /* Line Control Register */ macro
DcdefBF54x_base.h1653 #define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
1654 #define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
/arch/arm/mach-aaec2000/include/mach/
Daaec2000.h40 #define UART1_LCR __REG(0x80000604) /* Link Control Register */ macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h550 #define UART1_LCR 0xFFC0200C /* Line Control Register */ macro
DcdefBF51x_base.h968 #define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
969 #define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h550 #define UART1_LCR 0xFFC0200C /* Line Control Register */ macro
DcdefBF52x_base.h968 #define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
969 #define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h523 #define UART1_LCR 0xFFC0200C /* Line Control Register */ macro
DcdefBF534.h927 #define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
928 #define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h722 #define UART1_LCR 0xFFC0200C /* Line Control Register */ macro
DcdefBF538.h144 #define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
145 #define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)