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Searched refs:_ULCAST_ (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/
Dmipsregs.h35 #define _ULCAST_
37 #define _ULCAST_ (unsigned long) macro
229 #define IE_SW0 (_ULCAST_(1) << 8)
230 #define IE_SW1 (_ULCAST_(1) << 9)
231 #define IE_IRQ0 (_ULCAST_(1) << 10)
232 #define IE_IRQ1 (_ULCAST_(1) << 11)
233 #define IE_IRQ2 (_ULCAST_(1) << 12)
234 #define IE_IRQ3 (_ULCAST_(1) << 13)
235 #define IE_IRQ4 (_ULCAST_(1) << 14)
236 #define IE_IRQ5 (_ULCAST_(1) << 15)
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Dmipsmtregs.h69 #define MVPCONTROL_EVP (_ULCAST_(1))
72 #define MVPCONTROL_VPC (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT)
75 #define MVPCONTROL_STLB (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT)
80 #define MVPCONF0_PTC ( _ULCAST_(0xff))
82 #define MVPCONF0_PVPE ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT)
84 #define MVPCONF0_TCA ( _ULCAST_(1) << MVPCONF0_TCA_SHIFT)
86 #define MVPCONF0_PTLBE (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT)
88 #define MVPCONF0_TLBS (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT)
90 #define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT)
95 #define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT)
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