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Searched refs:alpha_mv (Results 1 – 25 of 39) sorted by relevance

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/arch/alpha/kernel/
Dmachvec_impl.h15 #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache)
16 #define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache)
17 #define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)
18 #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)
19 #define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache)
20 #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache)
23 #define CIA_HAE_ADDRESS (&alpha_mv.hae_cache)
26 #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache)
147 struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv")));
Dsys_nautilus.c60 alpha_mv.device_interrupt = srm_device_interrupt; in nautilus_init_irq()
207 bus = pci_scan_bus(0, alpha_mv.pci_ops, hose); in nautilus_init_pci()
237 if (memtop > alpha_mv.min_mem_address) { in nautilus_init_pci()
238 free_reserved_mem(__va(alpha_mv.min_mem_address), in nautilus_init_pci()
241 (memtop - alpha_mv.min_mem_address) >> 10); in nautilus_init_pci()
252 pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq); in nautilus_init_pci()
Dsys_sio.c51 alpha_mv.device_interrupt = srm_device_interrupt; in sio_init_irq()
93 orig_route_tab, alpha_mv.sys.sio.route_tab); in sio_pci_route()
101 alpha_mv.sys.sio.route_tab); in sio_pci_route()
182 tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq); in noname_map_irq()
201 tmp = __kernel_extbl(alpha_mv.sys.sio.route_tab, irq); in p2k_map_irq()
Dsys_titan.c219 if (alpha_using_srm && !alpha_mv.device_interrupt) in titan_init_irq()
220 alpha_mv.device_interrupt = titan_srm_device_interrupt; in titan_init_irq()
221 if (!alpha_mv.device_interrupt) in titan_init_irq()
222 alpha_mv.device_interrupt = titan_device_interrupt; in titan_init_irq()
265 alpha_mv.device_interrupt(vector); in titan_dispatch_irqs()
Dirq_alpha.c79 alpha_mv.machine_check(vector, la_ptr); in do_entInt()
84 alpha_mv.device_interrupt(vector); in do_entInt()
113 alpha_mv.init_irq(); in init_IRQ()
Dpci_iommu.c162 alpha_mv.mv_pci_tbi(arena->hose, 0, -1); in iommu_arena_find_pages()
259 ret = paddr + alpha_mv.pci_dac_offset; in pci_map_single_1()
270 if (! alpha_mv.mv_pci_tbi) { in pci_map_single_1()
393 alpha_mv.mv_pci_tbi(hose, dma_addr, dma_addr + size - 1); in pci_unmap_single()
439 if (alpha_mv.mv_pci_tbi || (gfp & GFP_DMA)) in __pci_alloc_consistent()
563 out->dma_address = paddr + alpha_mv.pci_dac_offset; in sg_fill()
664 sg_classify(dev, sg, end, alpha_mv.mv_pci_tbi != 0); in pci_map_sg()
667 if (alpha_mv.mv_pci_tbi) { in pci_map_sg()
729 if (! alpha_mv.mv_pci_tbi) in pci_unmap_sg()
784 alpha_mv.mv_pci_tbi(hose, fbeg, fend); in pci_unmap_sg()
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Dsys_eb64p.c126 alpha_mv = cabriolet_mv; in eb64p_init_irq()
127 alpha_mv.init_irq(); in eb64p_init_irq()
Dpci.c196 if (alpha_mv.init_pci) in pcibios_init()
197 alpha_mv.init_pci(); in pcibios_init()
423 bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); in common_init_pci()
438 pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq); in common_init_pci()
Dsys_takara.c139 alpha_mv.device_interrupt = takara_srm_device_interrupt; in takara_init_irq()
264 alpha_mv.pci_map_irq = takara_map_irq_srm; in takara_init_pci()
Dsys_alcor.c132 alpha_mv.device_interrupt = srm_device_interrupt; in alcor_init_irq()
260 alpha_mv.sys.cia.gru_int_req_bits = XLT_GRU_INT_REQ_BITS; in alcor_init_pci()
Dsetup.c117 struct alpha_machine_vector alpha_mv; variable
640 if (vec != &alpha_mv) { in setup_arch()
641 alpha_mv = *vec; in setup_arch()
650 var_name, alpha_mv.vector_name, in setup_arch()
691 srm_hae = *alpha_mv.hae_register; in setup_arch()
692 __set_hae(alpha_mv.hae_cache); in setup_arch()
705 if (alpha_mv.init_arch) in setup_arch()
706 alpha_mv.init_arch(); in setup_arch()
Dsys_sx164.c45 alpha_mv.device_interrupt = srm_device_interrupt; in sx164_init_irq()
Dalpha_ksyms.c27 EXPORT_SYMBOL(alpha_mv);
Dirq_i8259.c119 # define IACK_SC alpha_mv.iack_sc
Dcore_cia.c523 alpha_mv.mv_pci_tbi = cia_pci_tbi_try2; in verify_tb_operation()
534 alpha_mv.mv_pci_tbi(arena->hose, 0, -1); in verify_tb_operation()
553 alpha_mv.mv_pci_tbi = NULL; in verify_tb_operation()
765 alpha_mv.pci_dac_offset = 0x200000000UL; in do_init_arch()
766 *(vip)CIA_IOC_PCI_W_DAC = alpha_mv.pci_dac_offset >> 32; in do_init_arch()
/arch/alpha/include/asm/
Dmmzone.h19 (alpha_mv.pa_to_nid \
20 ? alpha_mv.pa_to_nid(pa) \
23 (alpha_mv.node_mem_start \
24 ? alpha_mv.node_mem_start(nid) \
27 (alpha_mv.node_mem_size \
28 ? alpha_mv.node_mem_size(nid) \
Drtc.h5 # define get_rtc_time alpha_mv.rtc_get_time
6 # define set_rtc_time alpha_mv.rtc_set_time
Dio.h43 alpha_mv.hae_cache = new_hae; in __set_hae()
44 *alpha_mv.hae_register = new_hae; in __set_hae()
47 new_hae = *alpha_mv.hae_register; in __set_hae()
54 if (new_hae != alpha_mv.hae_cache) in set_hae()
148 return alpha_mv.mv_##NAME(addr); \
154 alpha_mv.mv_##NAME(b, addr); \
178 return alpha_mv.mv_ioportmap(a); in REMAP1()
183 return alpha_mv.mv_ioremap(a, s); in generic_ioremap()
188 return alpha_mv.mv_iounmap(a); in generic_iounmap()
193 return alpha_mv.mv_is_ioaddr(a); in generic_is_ioaddr()
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Dtopology.h13 if (!alpha_mv.cpuid_to_nid) in cpu_to_node()
16 node = alpha_mv.cpuid_to_nid(cpu); in cpu_to_node()
Dtlbflush.h62 # define flush_tlb_current alpha_mv.mv_flush_tlb_current
63 # define flush_tlb_current_page alpha_mv.mv_flush_tlb_current_page
Dmmu_context.h69 # define MAX_ASN (alpha_mv.max_asn)
217 # define switch_mm(a,b,c) alpha_mv.mv_switch_mm((a),(b),(c))
218 # define activate_mm(x,y) alpha_mv.mv_activate_mm((x),(y))
Dhw_irq.h8 #define ACTUAL_NR_IRQS alpha_mv.nr_irqs
Dpci.h57 #define PCIBIOS_MIN_IO alpha_mv.min_io_address
58 #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
Ddma.h107 # define MAX_ISA_DMA_ADDRESS (alpha_mv.max_isa_dma_address)
125 #define MAX_DMA_ADDRESS (alpha_mv.mv_pci_tbi ? \
Dmachvec.h125 extern struct alpha_machine_vector alpha_mv;

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