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Searched refs:areg (Results 1 – 12 of 12) sorted by relevance

/arch/xtensa/include/asm/
Delf.h171 do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
172 _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
173 _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
174 _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
Dprocessor.h150 regs->areg[1] = new_sp; \
151 regs->areg[0] = 0; \
180 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
Dptrace.h111 unsigned long areg[16]; /* 128 (64) */ member
/arch/xtensa/kernel/
Dasm-offsets.c43 DEFINE(PT_AREG, offsetof (struct pt_regs, areg[0])); in main()
44 DEFINE(PT_AREG0, offsetof (struct pt_regs, areg[0])); in main()
45 DEFINE(PT_AREG1, offsetof (struct pt_regs, areg[1])); in main()
46 DEFINE(PT_AREG2, offsetof (struct pt_regs, areg[2])); in main()
47 DEFINE(PT_AREG3, offsetof (struct pt_regs, areg[3])); in main()
48 DEFINE(PT_AREG4, offsetof (struct pt_regs, areg[4])); in main()
49 DEFINE(PT_AREG5, offsetof (struct pt_regs, areg[5])); in main()
50 DEFINE(PT_AREG6, offsetof (struct pt_regs, areg[6])); in main()
51 DEFINE(PT_AREG7, offsetof (struct pt_regs, areg[7])); in main()
52 DEFINE(PT_AREG8, offsetof (struct pt_regs, areg[8])); in main()
[all …]
Dsignal.c81 if (__get_user(sp, (int*)(regs->areg[base * 4 + 1] - 12))) in flush_window_regs_user()
98 &regs->areg[(base + 1) * 4], 16)) in flush_window_regs_user()
104 &regs->areg[(base + 1) * 4], 32)) in flush_window_regs_user()
111 sp = regs->areg[((base + inc) * 4 + 1) % XCHAL_NUM_AREGS]; in flush_window_regs_user()
112 if (copy_to_user((void*)(sp - 16), &regs->areg[base * 4], 16)) in flush_window_regs_user()
117 sp = regs->areg[base * 4 + 1]; in flush_window_regs_user()
155 err |= __copy_to_user (sc->sc_a, regs->areg, 16 * 4); in setup_sigcontext()
214 err |= __copy_from_user(regs->areg, sc->sc_a, 16 * 4); in restore_sigcontext()
254 frame = (struct rt_sigframe __user *) regs->areg[1]; in xtensa_rt_sigreturn()
271 ret = regs->areg[2]; in xtensa_rt_sigreturn()
[all …]
Dprocess.c197 childregs->areg[1] = tos; in copy_thread()
198 childregs->areg[2] = 0; in copy_thread()
206 childregs->areg[1] = usp; in copy_thread()
207 memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], in copy_thread()
208 &regs->areg[XCHAL_NUM_AREGS - len/4], len); in copy_thread()
211 childregs->areg[2] = childregs->areg[6]; in copy_thread()
296 memcpy(elfregs->a, regs->areg, live * 4); in xtensa_elf_core_copy_regs()
297 memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16); in xtensa_elf_core_copy_regs()
312 newsp = regs->areg[1]; in xtensa_clone()
Dptrace.c64 __put_user(regs->areg[i],gregset->a+((wb*4+i)%XCHAL_NUM_AREGS)); in ptrace_getregs()
66 __put_user(regs->areg[i],gregset->a+((wb*4+i)%XCHAL_NUM_AREGS)); in ptrace_getregs()
97 if (wb != 0 && __copy_from_user(regs->areg + XCHAL_NUM_AREGS - wb * 4, in ptrace_setregs()
101 if (__copy_from_user(regs->areg, gregset->a + wb*4, (WSBITS-wb) * 16)) in ptrace_setregs()
166 tmp = regs->areg[regno - REG_AR_BASE]; in ptrace_peekusr()
170 tmp = regs->areg[regno - REG_A_BASE]; in ptrace_peekusr()
227 regs->areg[regno - REG_AR_BASE] = val; in ptrace_pokeusr()
231 regs->areg[regno - REG_A_BASE] = val; in ptrace_pokeusr()
Dtraps.c356 printk("%08lx ", regs->areg[i]); in show_regs()
482 show_stack(NULL, (unsigned long*)regs->areg[1]); in die()
/arch/powerpc/kernel/
Dalign.c643 unsigned int areg, struct pt_regs *regs, in emulate_vsx() argument
666 regs->gpr[areg] = regs->dar; in emulate_vsx()
684 unsigned int reg, areg; in fix_alignment() local
730 areg = dsisr & 0x1f; /* register to update */ in fix_alignment()
786 return emulate_vsx(addr, reg, areg, regs, flags, nb); in fix_alignment()
929 regs->gpr[areg] = regs->dar; in fix_alignment()
/arch/xtensa/mm/
Dfault.c239 address, regs->pc, regs->areg[0]); in bad_page_fault()
/arch/m68k/ifpsp060/src/
Dpfpsp.S4941 bsr.l fetch_dreg # fetch base areg
Dfpsp.S18892 bsr.l fetch_dreg # fetch base areg