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Searched refs:batch (Results 1 – 7 of 7) sorted by relevance

/arch/powerpc/mm/
Dtlb_hash64.c52 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); in hpte_need_flush() local
59 i = batch->index; in hpte_need_flush()
101 if (!batch->active) { in hpte_need_flush()
116 if (i != 0 && (mm != batch->mm || batch->psize != psize || in hpte_need_flush()
117 batch->ssize != ssize)) { in hpte_need_flush()
118 __flush_tlb_pending(batch); in hpte_need_flush()
122 batch->mm = mm; in hpte_need_flush()
123 batch->psize = psize; in hpte_need_flush()
124 batch->ssize = ssize; in hpte_need_flush()
126 batch->pte[i] = rpte; in hpte_need_flush()
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Dpgtable.c65 struct pte_freelist_batch *batch = in pte_free_rcu_callback() local
69 for (i = 0; i < batch->index; i++) in pte_free_rcu_callback()
70 pgtable_free(batch->tables[i]); in pte_free_rcu_callback()
72 free_page((unsigned long)batch); in pte_free_rcu_callback()
75 static void pte_free_submit(struct pte_freelist_batch *batch) in pte_free_submit() argument
77 INIT_RCU_HEAD(&batch->rcu); in pte_free_submit()
78 call_rcu(&batch->rcu, pte_free_rcu_callback); in pte_free_submit()
Dhash_native_64.c468 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); in native_flush_hash_range() local
469 unsigned long psize = batch->psize; in native_flush_hash_range()
470 int ssize = batch->ssize; in native_flush_hash_range()
476 va = batch->vaddr[i]; in native_flush_hash_range()
477 pte = batch->pte[i]; in native_flush_hash_range()
502 va = batch->vaddr[i]; in native_flush_hash_range()
503 pte = batch->pte[i]; in native_flush_hash_range()
519 va = batch->vaddr[i]; in native_flush_hash_range()
520 pte = batch->pte[i]; in native_flush_hash_range()
Dhash_utils_64.c1112 struct ppc64_tlb_batch *batch = in flush_hash_range() local
1116 flush_hash_page(batch->vaddr[i], batch->pte[i], in flush_hash_range()
1117 batch->psize, batch->ssize, local); in flush_hash_range()
/arch/powerpc/include/asm/
Dtlbflush.h95 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
104 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); in arch_enter_lazy_mmu_mode() local
106 batch->active = 1; in arch_enter_lazy_mmu_mode()
111 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); in arch_leave_lazy_mmu_mode() local
113 if (batch->index) in arch_leave_lazy_mmu_mode()
114 __flush_tlb_pending(batch); in arch_leave_lazy_mmu_mode()
115 batch->active = 0; in arch_leave_lazy_mmu_mode()
/arch/powerpc/platforms/pseries/
Dlpar.c546 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); in pSeries_lpar_flush_hash_range() local
557 psize = batch->psize; in pSeries_lpar_flush_hash_range()
558 ssize = batch->ssize; in pSeries_lpar_flush_hash_range()
561 va = batch->vaddr[i]; in pSeries_lpar_flush_hash_range()
562 pte = batch->pte[i]; in pSeries_lpar_flush_hash_range()
/arch/arm/lib/
Dlib1funcs.S171 @ Do comparisons in batch of 4 first.