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Searched refs:cache_line_size (Results 1 – 3 of 3) sorted by relevance

/arch/mips/mm/
Dpage.c126 static int cache_line_size __cpuinitdata;
127 #define cache_line_mask() (cache_line_size - 1)
173 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
233 cache_line_size = cpu_scache_line_size(); in set_prefetch_parameters()
235 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
242 max(cache_line_size >> 1, in set_prefetch_parameters()
245 max(cache_line_size >> 1, in set_prefetch_parameters()
266 } else if (cache_line_size == (half_clear_loop_size << 1)) { in build_clear_pref()
315 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) in build_clear_page()
316 * cache_line_size : 0; in build_clear_page()
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/arch/x86/kernel/
Dsetup_percpu.c106 size = roundup(sizeof(struct x8664_pda), cache_line_size()); in setup_cpu_pda_map()
113 tsize = roundup(tsize, cache_line_size()); in setup_cpu_pda_map()
/arch/x86/include/asm/
Dprocessor.h159 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro