| /arch/powerpc/platforms/cell/ |
| D | interrupt.c | 107 int cascade; in iic_ioexc_cascade() local
118 for (cascade = 63; cascade >= 0; cascade--) in iic_ioexc_cascade()
119 if (bits & (0x8000000000000000UL >> cascade)) { in iic_ioexc_cascade()
122 base | cascade); in iic_ioexc_cascade()
371 unsigned int node, cascade, found = 0; in setup_iic() local
403 cascade = node << IIC_IRQ_NODE_SHIFT; in setup_iic()
404 cascade |= 1 << IIC_IRQ_CLASS_SHIFT; in setup_iic()
405 cascade |= IIC_UNIT_IIC; in setup_iic()
406 cascade = irq_create_mapping(iic_host, cascade); in setup_iic()
407 if (cascade == NO_IRQ) in setup_iic()
[all …]
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| /arch/arm/mach-shark/ |
| D | irq.c | 69 static struct irqaction cascade; variable
105 cascade.handler = bogus_int; in shark_init_irq()
106 cascade.name = "cascade"; in shark_init_irq()
107 setup_irq(2,&cascade); in shark_init_irq()
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| /arch/mips/cobalt/ |
| D | irq.c | 48 static struct irqaction cascade = { variable
60 setup_irq(GT641XX_CASCADE_IRQ, &cascade); in arch_init_irq()
61 setup_irq(I8259_CASCADE_IRQ, &cascade); in arch_init_irq()
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| /arch/mips/vr41xx/common/ |
| D | irq.c | 64 irq_cascade_t *cascade; in irq_dispatch() local
72 cascade = irq_cascade + irq; in irq_dispatch()
73 if (cascade->get_irq != NULL) { in irq_dispatch()
83 ret = cascade->get_irq(irq); in irq_dispatch()
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| /arch/mips/mach-goldfish/ |
| D | goldfish-interrupt.c | 101 static struct irqaction cascade = { variable
121 setup_irq(MIPS_CPU_IRQ_BASE+MIPS_CPU_IRQ_PIC, &cascade); in arch_init_irq()
122 setup_irq(MIPS_CPU_IRQ_BASE+MIPS_CPU_IRQ_FIQ, &cascade); in arch_init_irq()
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| /arch/mips/lasat/ |
| D | interrupt.c | 105 static struct irqaction cascade = { variable
134 setup_irq(LASAT_CASCADE_IRQ, &cascade); in arch_init_irq()
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| /arch/alpha/kernel/ |
| D | irq_i8259.c | 99 static struct irqaction cascade = { in init_i8259a_irqs() local
114 setup_irq(2, &cascade); in init_i8259a_irqs()
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| /arch/powerpc/platforms/pseries/ |
| D | setup.c | 126 unsigned int cascade; in pseries_setup_i8259_cascade() local
143 cascade = irq_of_parse_and_map(found, 0); in pseries_setup_i8259_cascade()
144 if (cascade == NO_IRQ) { in pseries_setup_i8259_cascade()
148 pr_debug("pic: cascade mapped to irq %d\n", cascade); in pseries_setup_i8259_cascade()
169 set_irq_chained_handler(cascade, pseries_8259_cascade); in pseries_setup_i8259_cascade()
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| /arch/powerpc/platforms/powermac/ |
| D | pic.c | 501 unsigned int cascade; in pmac_pic_probe_mpic() local
542 cascade = irq_of_parse_and_map(slave, 0); in pmac_pic_probe_mpic()
543 if (cascade == NO_IRQ) { in pmac_pic_probe_mpic()
554 set_irq_data(cascade, mpic2); in pmac_pic_probe_mpic()
555 set_irq_chained_handler(cascade, pmac_u3_cascade); in pmac_pic_probe_mpic()
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| /arch/powerpc/boot/dts/ |
| D | arches.dts | 89 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
101 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
113 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| D | taishan.dts | 73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
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| D | haleakala.dts | 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
80 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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| D | katmai.dts | 73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
85 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
97 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| D | canyonlands.dts | 70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| D | rainier.dts | 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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| D | sequoia.dts | 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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| D | glacier.dts | 71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| D | kilauea.dts | 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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| D | makalu.dts | 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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| D | warp.dts | 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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| D | sam440ep.dts | 75 interrupts = <0x1e 4 0x1f 4>; /* cascade */
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| D | bamboo.dts | 74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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| D | yosemite.dts | 72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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| D | ebony.dts | 73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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| /arch/h8300/ |
| D | Kconfig.cpu | 125 bool "8bit timer (2ch cascade)"
|