| /arch/arm/mach-omap2/ |
| D | clock.c | 76 void omap2_init_clk_clkdm(struct clk *clk) in omap2_init_clk_clkdm() argument
80 if (!clk->clkdm_name) in omap2_init_clk_clkdm()
83 clkdm = clkdm_lookup(clk->clkdm_name); in omap2_init_clk_clkdm()
86 clk->name, clk->clkdm_name); in omap2_init_clk_clkdm()
87 clk->clkdm = clkdm; in omap2_init_clk_clkdm()
90 "clkdm %s\n", clk->name, clk->clkdm_name); in omap2_init_clk_clkdm()
102 void omap2_init_clksel_parent(struct clk *clk) in omap2_init_clksel_parent() argument
108 if (!clk->clksel) in omap2_init_clksel_parent()
111 r = __raw_readl(clk->clksel_reg) & clk->clksel_mask; in omap2_init_clksel_parent()
112 r >>= __ffs(clk->clksel_mask); in omap2_init_clksel_parent()
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| D | clock.h | 25 int omap2_clk_enable(struct clk *clk);
26 void omap2_clk_disable(struct clk *clk);
27 long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
28 int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
29 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
30 int omap2_dpll_rate_tolerance_set(struct clk *clk, unsigned int tolerance);
31 long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
34 void omap2_clk_disable_unused(struct clk *clk);
39 void omap2_clksel_recalc(struct clk *clk);
40 void omap2_init_clk_clkdm(struct clk *clk);
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| D | clock34xx.c | 54 static void omap3_dpll_recalc(struct clk *clk) in omap3_dpll_recalc() argument
56 clk->rate = omap2_get_dpll_rate(clk); in omap3_dpll_recalc()
58 propagate_rate(clk); in omap3_dpll_recalc()
62 static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits) in _omap3_dpll_write_clken() argument
67 dd = clk->dpll_data; in _omap3_dpll_write_clken()
76 static int _omap3_wait_dpll_status(struct clk *clk, u8 state) in _omap3_wait_dpll_status() argument
83 dd = clk->dpll_data; in _omap3_wait_dpll_status()
96 clk->name, (state) ? "locked" : "bypassed"); in _omap3_wait_dpll_status()
99 clk->name, (state) ? "locked" : "bypassed", i); in _omap3_wait_dpll_status()
119 static int _omap3_noncore_dpll_lock(struct clk *clk) in _omap3_noncore_dpll_lock() argument
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| /arch/arm/mach-pnx4008/ |
| D | clock.c | 31 static struct clk per_ck;
32 static struct clk hclk_ck;
33 static struct clk ck_1MHz;
34 static struct clk ck_13MHz;
35 static struct clk ck_pll1;
36 static int local_set_rate(struct clk *clk, u32 rate);
48 static void propagate_rate(struct clk *clk) in propagate_rate() argument
50 struct clk *tmp_clk; in propagate_rate()
52 tmp_clk = clk; in propagate_rate()
59 static inline void clk_reg_disable(struct clk *clk) in clk_reg_disable() argument
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| /arch/arm/plat-s3c/ |
| D | clock.c | 63 static int clk_null_enable(struct clk *clk, int enable) in clk_null_enable() argument
70 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
72 struct clk *p; in clk_get()
73 struct clk *clk = ERR_PTR(-ENOENT); in clk_get() local
87 clk = p; in clk_get()
95 if (IS_ERR(clk)) { in clk_get()
99 clk = p; in clk_get()
106 return clk; in clk_get()
109 void clk_put(struct clk *clk) in clk_put() argument
111 module_put(clk->owner); in clk_put()
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| D | pwm-clock.c | 76 static struct clk clk_timer_scaler[];
78 static unsigned long clk_pwm_scaler_get_rate(struct clk *clk) in clk_pwm_scaler_get_rate() argument
82 if (clk == &clk_timer_scaler[1]) { in clk_pwm_scaler_get_rate()
89 return clk_get_rate(clk->parent) / (tcfg0 + 1); in clk_pwm_scaler_get_rate()
92 static unsigned long clk_pwm_scaler_round_rate(struct clk *clk, in clk_pwm_scaler_round_rate() argument
95 unsigned long parent_rate = clk_get_rate(clk->parent); in clk_pwm_scaler_round_rate()
106 static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate) in clk_pwm_scaler_set_rate() argument
108 unsigned long round = clk_pwm_scaler_round_rate(clk, rate); in clk_pwm_scaler_set_rate()
113 divisor = clk_get_rate(clk->parent) / round; in clk_pwm_scaler_set_rate()
119 if (clk == &clk_timer_scaler[1]) { in clk_pwm_scaler_set_rate()
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| /arch/arm/mach-omap1/ |
| D | clock.c | 37 static void omap1_watchdog_recalc(struct clk * clk) in omap1_watchdog_recalc() argument
39 clk->rate = clk->parent->rate / 14; in omap1_watchdog_recalc()
42 static void omap1_uart_recalc(struct clk * clk) in omap1_uart_recalc() argument
44 unsigned int val = omap_readl(clk->enable_reg); in omap1_uart_recalc()
45 if (val & clk->enable_bit) in omap1_uart_recalc()
46 clk->rate = 48000000; in omap1_uart_recalc()
48 clk->rate = 12000000; in omap1_uart_recalc()
51 static void omap1_sossi_recalc(struct clk *clk) in omap1_sossi_recalc() argument
57 clk->rate = clk->parent->rate / div; in omap1_sossi_recalc()
60 static int omap1_clk_enable_dsp_domain(struct clk *clk) in omap1_clk_enable_dsp_domain() argument
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| D | clock.h | 16 static int omap1_clk_enable_generic(struct clk * clk);
17 static void omap1_clk_disable_generic(struct clk * clk);
18 static void omap1_ckctl_recalc(struct clk * clk);
19 static void omap1_watchdog_recalc(struct clk * clk);
20 static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
21 static void omap1_sossi_recalc(struct clk *clk);
22 static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
23 static int omap1_clk_enable_dsp_domain(struct clk * clk);
24 static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
25 static void omap1_clk_disable_dsp_domain(struct clk * clk);
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| /arch/sh/kernel/cpu/ |
| D | clock.c | 43 static struct clk master_clk = {
49 static struct clk module_clk = {
55 static struct clk bus_clk = {
61 static struct clk cpu_clk = {
70 static struct clk *onchip_clocks[] = {
77 static void propagate_rate(struct clk *clk) in propagate_rate() argument
79 struct clk *clkp; in propagate_rate()
82 if (likely(clkp->parent != clk)) in propagate_rate()
91 static int __clk_enable(struct clk *clk) in __clk_enable() argument
100 if (unlikely(atomic_read(&clk->kref.refcount) == 1)) in __clk_enable()
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| /arch/arm/plat-mxc/ |
| D | clock.c | 58 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
60 struct clk *p, *clk = ERR_PTR(-ENOENT); in clk_get() local
65 return clk; in clk_get()
77 clk = p; in clk_get()
92 clk = p; in clk_get()
100 clk = p; in clk_get()
110 return clk; in clk_get()
114 static void __clk_disable(struct clk *clk) in __clk_disable() argument
116 if (clk == NULL || IS_ERR(clk)) in __clk_disable()
119 __clk_disable(clk->parent); in __clk_disable()
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| /arch/arm/plat-s3c/include/plat/ |
| D | clock.h | 14 struct clk { struct
17 struct clk *parent; argument
24 int (*enable)(struct clk *, int enable); argument
25 int (*set_rate)(struct clk *c, unsigned long rate); argument
26 unsigned long (*get_rate)(struct clk *c); argument
27 unsigned long (*round_rate)(struct clk *c, unsigned long rate); argument
28 int (*set_parent)(struct clk *c, struct clk *parent); argument
33 extern struct clk s3c24xx_dclk0;
34 extern struct clk s3c24xx_dclk1;
35 extern struct clk s3c24xx_clkout0;
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| /arch/avr32/mach-at32ap/ |
| D | clock.c | 30 void at32_clk_register(struct clk *clk) in at32_clk_register() argument
34 list_add_tail(&clk->list, &at32_clock_list); in at32_clk_register()
38 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
40 struct clk *clk; in clk_get() local
44 list_for_each_entry(clk, &at32_clock_list, list) { in clk_get()
45 if (clk->dev == dev && strcmp(id, clk->name) == 0) { in clk_get()
47 return clk; in clk_get()
56 void clk_put(struct clk *clk) in clk_put() argument
62 static void __clk_enable(struct clk *clk) in __clk_enable() argument
64 if (clk->parent) in __clk_enable()
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| /arch/powerpc/platforms/512x/ |
| D | clock.c | 37 struct clk { struct
44 void (*calc) (struct clk *); argument
45 struct clk *parent; argument
53 static struct clk *mpc5121_clk_get(struct device *dev, const char *id) in mpc5121_clk_get() argument
55 struct clk *p, *clk = ERR_PTR(-ENOENT); in mpc5121_clk_get() local
69 clk = p; in mpc5121_clk_get()
75 return clk; in mpc5121_clk_get()
81 struct clk *p; in dump_clocks()
102 static void mpc5121_clk_put(struct clk *clk) in mpc5121_clk_put() argument
104 module_put(clk->owner); in mpc5121_clk_put()
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| /arch/arm/mach-at91/ |
| D | clock.c | 57 static struct clk clk32k = {
64 static struct clk main_clk = {
70 static struct clk plla = {
78 static void pllb_mode(struct clk *clk, int is_on) in pllb_mode() argument
96 static struct clk pllb = {
105 static void pmc_sys_mode(struct clk *clk, int is_on) in pmc_sys_mode() argument
108 at91_sys_write(AT91_PMC_SCER, clk->pmc_mask); in pmc_sys_mode()
110 at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask); in pmc_sys_mode()
113 static void pmc_uckr_mode(struct clk *clk, int is_on) in pmc_uckr_mode() argument
119 at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask); in pmc_uckr_mode()
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| /arch/arm/plat-omap/include/mach/ |
| D | clock.h | 17 struct clk;
29 struct clk *parent;
60 struct clk { struct
65 struct clk *parent; argument
71 void (*recalc)(struct clk *); argument
72 int (*set_rate)(struct clk *, unsigned long); argument
73 long (*round_rate)(struct clk *, unsigned long); argument
74 void (*init)(struct clk *); argument
75 int (*enable)(struct clk *); argument
76 void (*disable)(struct clk *); argument
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| /arch/arm/mach-mx1/ |
| D | clock.c | 30 static int _clk_enable(struct clk *clk) in _clk_enable() argument
34 reg = __raw_readl(clk->enable_reg); in _clk_enable()
35 reg |= 1 << clk->enable_shift; in _clk_enable()
36 __raw_writel(reg, clk->enable_reg); in _clk_enable()
41 static void _clk_disable(struct clk *clk) in _clk_disable() argument
45 reg = __raw_readl(clk->enable_reg); in _clk_disable()
46 reg &= ~(1 << clk->enable_shift); in _clk_disable()
47 __raw_writel(reg, clk->enable_reg); in _clk_disable()
50 static int _clk_can_use_parent(const struct clk *clk_arr[], unsigned int size, in _clk_can_use_parent()
51 struct clk *parent) in _clk_can_use_parent()
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| /arch/arm/plat-omap/ |
| D | clock.c | 43 struct clk * clk_get(struct device *dev, const char *id) in clk_get()
45 struct clk *p, *clk = ERR_PTR(-ENOENT); in clk_get() local
58 clk = p; in clk_get()
65 clk = p; in clk_get()
73 return clk; in clk_get()
77 int clk_enable(struct clk *clk) in clk_enable() argument
82 if (clk == NULL || IS_ERR(clk)) in clk_enable()
87 ret = arch_clock->clk_enable(clk); in clk_enable()
94 void clk_disable(struct clk *clk) in clk_disable() argument
98 if (clk == NULL || IS_ERR(clk)) in clk_disable()
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| /arch/arm/mach-msm/ |
| D | clock.c | 91 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
93 struct clk *clk; in clk_get() local
97 list_for_each_entry(clk, &clocks, list) in clk_get()
98 if (!strcmp(id, clk->name) && clk->dev == dev) in clk_get()
101 list_for_each_entry(clk, &clocks, list) in clk_get()
102 if (!strcmp(id, clk->name) && clk->dev == NULL) in clk_get()
105 clk = ERR_PTR(-ENOENT); in clk_get()
108 return clk; in clk_get()
112 void clk_put(struct clk *clk) in clk_put() argument
117 int clk_enable(struct clk *clk) in clk_enable() argument
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| /arch/arm/mach-ns9xxx/ |
| D | clock.c | 24 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
26 struct clk *p, *ret = NULL, *retgen = NULL; in clk_get()
62 void clk_put(struct clk *clk) in clk_put() argument
64 module_put(clk->owner); in clk_put()
65 --clk->refcount; in clk_put()
69 static int clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked() argument
72 if (clk->parent) { in clk_enable_unlocked()
73 ret = clk_enable_unlocked(clk->parent); in clk_enable_unlocked()
78 if (clk->usage++ == 0 && clk->endisable) in clk_enable_unlocked()
79 ret = clk->endisable(clk, 1); in clk_enable_unlocked()
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| /arch/sh/include/asm/ |
| D | clock.h | 10 struct clk;
13 void (*init)(struct clk *clk);
14 void (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 void (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 long (*round_rate)(struct clk *clk, unsigned long rate);
21 struct clk { struct
27 struct clk *parent; argument
47 void clk_recalc_rate(struct clk *); argument
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| /arch/sh/kernel/cpu/sh4/ |
| D | clock-sh4-202.c | 24 static void emi_clk_recalc(struct clk *clk) in emi_clk_recalc() argument
27 clk->rate = clk->parent->rate / frqcr3_divisors[idx]; in emi_clk_recalc()
30 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate) in frqcr3_lookup() argument
32 int divisor = clk->parent->rate / rate; in frqcr3_lookup()
47 static struct clk sh4202_emi_clk = {
53 static void femi_clk_recalc(struct clk *clk) in femi_clk_recalc() argument
56 clk->rate = clk->parent->rate / frqcr3_divisors[idx]; in femi_clk_recalc()
63 static struct clk sh4202_femi_clk = {
69 static void shoc_clk_init(struct clk *clk) in shoc_clk_init() argument
85 if (clk->ops->set_rate(clk, clk->parent->rate / in shoc_clk_init()
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7785.c | 27 static void master_clk_init(struct clk *clk) in master_clk_init() argument
29 clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f]; in master_clk_init()
36 static void module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
39 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
46 static void bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
49 clk->rate = clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
56 static void cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
59 clk->rate = clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
79 static void shyway_clk_recalc(struct clk *clk) in shyway_clk_recalc() argument
82 clk->rate = clk->parent->rate / sfc_divisors[idx]; in shyway_clk_recalc()
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| /arch/powerpc/kernel/ |
| D | clock.c | 14 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
22 void clk_put(struct clk *clk) in clk_put() argument
25 clk_functions.clk_put(clk); in clk_put()
29 int clk_enable(struct clk *clk) in clk_enable() argument
32 return clk_functions.clk_enable(clk); in clk_enable()
37 void clk_disable(struct clk *clk) in clk_disable() argument
40 clk_functions.clk_disable(clk); in clk_disable()
44 unsigned long clk_get_rate(struct clk *clk) in clk_get_rate() argument
47 return clk_functions.clk_get_rate(clk); in clk_get_rate()
52 long clk_round_rate(struct clk *clk, unsigned long rate) in clk_round_rate() argument
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| /arch/arm/mach-davinci/ |
| D | clock.c | 43 struct clk *clk_get(struct device *dev, const char *id) in clk_get()
45 struct clk *p, *clk = ERR_PTR(-ENOENT); in clk_get() local
58 clk = p; in clk_get()
65 clk = p; in clk_get()
73 return clk; in clk_get()
77 void clk_put(struct clk *clk) in clk_put() argument
79 if (clk && !IS_ERR(clk)) in clk_put()
80 module_put(clk->owner); in clk_put()
84 static int __clk_enable(struct clk *clk) in __clk_enable() argument
86 if (clk->flags & ALWAYS_ENABLED) in __clk_enable()
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| /arch/powerpc/include/asm/ |
| D | clk_interface.h | 7 struct clk* (*clk_get) (struct device *dev, const char *id);
8 int (*clk_enable) (struct clk *clk);
9 void (*clk_disable) (struct clk *clk);
10 unsigned long (*clk_get_rate) (struct clk *clk);
11 void (*clk_put) (struct clk *clk);
12 long (*clk_round_rate) (struct clk *clk, unsigned long rate);
13 int (*clk_set_rate) (struct clk *clk, unsigned long rate);
14 int (*clk_set_parent) (struct clk *clk, struct clk *parent);
15 struct clk* (*clk_get_parent) (struct clk *clk);
|