Searched refs:clk_p (Results 1 – 10 of 10) sorted by relevance
| /arch/arm/plat-s3c64xx/ |
| D | clock.c | 104 .parent = &clk_p,
110 .parent = &clk_p,
116 .parent = &clk_p,
122 .parent = &clk_p,
128 .parent = &clk_p,
134 .parent = &clk_p,
168 .parent = &clk_p,
198 .parent = &clk_p,
204 .parent = &clk_p,
210 .parent = &clk_p,
[all …]
|
| D | s3c6400-clock.c | 612 clk_p.rate = pclk; in s3c6400_setup_clocks()
|
| /arch/arm/plat-s3c24xx/ |
| D | s3c2410-clock.c | 100 .parent = &clk_p,
106 .parent = &clk_p,
112 .parent = &clk_p,
118 .parent = &clk_p,
124 .parent = &clk_p,
140 .parent = &clk_p,
158 .parent = &clk_p,
164 .parent = &clk_p,
170 .parent = &clk_p,
176 .parent = &clk_p,
[all …]
|
| D | clock.c | 57 clk_p.rate = pclk; in s3c24xx_setup_clocks()
|
| D | clock-dclk.c | 48 else if (parent == &clk_p) in s3c24xx_dclk_setparent()
140 else if (parent == &clk_p) in s3c24xx_clkout_setparent()
|
| /arch/arm/mach-ep93xx/ |
| D | clock.c | 37 static struct clk clk_p; variable
54 INIT_CK(NULL, "pclk", &clk_p),
126 clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; in ep93xx_clock_init()
142 clk_p.rate / 1000000); in ep93xx_clock_init()
|
| /arch/arm/mach-s3c2443/ |
| D | clock.c | 701 .parent = &clk_p,
707 .parent = &clk_p,
713 .parent = &clk_p,
719 .parent = &clk_p,
725 .parent = &clk_p,
731 .parent = &clk_p,
783 .parent = &clk_p,
819 .parent = &clk_p,
825 .parent = &clk_p,
831 .parent = &clk_p,
[all …]
|
| /arch/arm/mach-s3c2412/ |
| D | clock.c | 459 .parent = &clk_p,
465 .parent = &clk_p,
471 .parent = &clk_p,
477 .parent = &clk_p,
483 .parent = &clk_p,
523 .parent = &clk_p,
541 .parent = &clk_p,
547 .parent = &clk_p,
553 .parent = &clk_p,
559 .parent = &clk_p,
[all …]
|
| /arch/arm/plat-s3c/include/plat/ |
| D | clock.h | 45 extern struct clk clk_p;
|
| /arch/arm/plat-s3c/ |
| D | clock.c | 282 struct clk clk_p = { variable
363 if (s3c24xx_register_clock(&clk_p) < 0) in s3c24xx_register_baseclocks()
|