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Searched refs:clrbits32 (Results 1 – 16 of 16) sorted by relevance

/arch/powerpc/sysdev/
Dppc4xx_gpio.c92 clrbits32(&regs->or, GPIO_MASK(gpio)); in __ppc4xx_gpio_set()
121 clrbits32(&regs->odr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
124 clrbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
128 clrbits32(&regs->osrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
129 clrbits32(&regs->tsrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
131 clrbits32(&regs->osrh, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
132 clrbits32(&regs->tsrh, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
154 clrbits32(&regs->odr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_out()
161 clrbits32(&regs->osrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_out()
162 clrbits32(&regs->tsrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_out()
[all …]
Dcpm2.c337 clrbits32(&iop[port].dir, pin); in cpm2_set_pin()
342 clrbits32(&iop[port].par, pin); in cpm2_set_pin()
347 clrbits32(&iop[port].sor, pin); in cpm2_set_pin()
352 clrbits32(&iop[port].odr, pin); in cpm2_set_pin()
Dcpm1.c62 clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); in cpm_mask_irq()
321 clrbits32(&iop->dir, pin); in cpm1_set_pin32()
326 clrbits32(&iop->par, pin); in cpm1_set_pin32()
339 clrbits32(&iop->sor, pin); in cpm1_set_pin32()
344 clrbits32(&mpc8xx_immr->im_cpm.cp_peodr, pin); in cpm1_set_pin32()
729 clrbits32(&iop->dir, pin_mask); in cpm1_gpio32_dir_in()
Dmpc8xxx_gpio.c90 clrbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio)); in mpc8xxx_gpio_dir_in()
Dcpm_common.c313 clrbits32(&iop->dir, pin_mask); in cpm2_gpio32_dir_in()
/arch/powerpc/platforms/8xx/
Dmpc885ads_setup.c52 clrbits32(&bcsr[1], BCSR1_PCCEN); in pcmcia_hw_setup()
94 clrbits32(&bcsr[1], 0x00610000); in pcmcia_set_voltage()
181 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
206 clrbits32(&bcsr[1], BCSR1_RS232EN_1); in mpc885ads_setup_arch()
210 clrbits32(&bcsr[1], BCSR1_RS232EN_2); in mpc885ads_setup_arch()
213 clrbits32(bcsr5, BCSR5_MII1_EN); in mpc885ads_setup_arch()
216 clrbits32(bcsr5, BCSR5_MII1_RST); in mpc885ads_setup_arch()
219 clrbits32(bcsr5, BCSR5_MII2_EN); in mpc885ads_setup_arch()
222 clrbits32(bcsr5, BCSR5_MII2_RST); in mpc885ads_setup_arch()
228 clrbits32(&bcsr[4], BCSR4_ETH10_RST); in mpc885ads_setup_arch()
Dmpc86xads_setup.c89 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
114 clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN); in mpc86xads_setup_arch()
Dadder875.c80 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
/arch/powerpc/platforms/82xx/
Dpq2fads.c141 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); in pq2fads_setup_arch()
144 clrbits32(&bcsr[3], BCSR3_FETHIEN2); in pq2fads_setup_arch()
152 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000); in pq2fads_setup_arch()
Dmpc8272_ads.c147 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); in mpc8272_ads_setup_arch()
150 clrbits32(&bcsr[3], BCSR3_FETHIEN2); in mpc8272_ads_setup_arch()
Dmgcoge.c89 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); in mgcoge_setup_arch()
Dpq2ads-pci-pic.c66 clrbits32(&priv->regs->mask, 1 << irq); in pq2ads_pci_unmask_irq()
Dep8248e.c263 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); in ep8248e_setup_arch()
/arch/powerpc/sysdev/qe_lib/
Ducc.c114 clrbits32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
/arch/powerpc/include/asm/
Dfsl_lbc.h262 clrbits32(upm->mxmr, MxMR_OP_RP); in fsl_upm_end_pattern()
Dio.h744 #define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v)) macro