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Searched refs:cpu_has_llsc (Results 1 – 22 of 22) sorted by relevance

/arch/mips/include/asm/
Datomic.h52 if (cpu_has_llsc && R10000_LLSC_WAR) { in atomic_add()
64 } else if (cpu_has_llsc) { in atomic_add()
97 if (cpu_has_llsc && R10000_LLSC_WAR) { in atomic_sub()
109 } else if (cpu_has_llsc) { in atomic_sub()
142 if (cpu_has_llsc && R10000_LLSC_WAR) { in atomic_add_return()
156 } else if (cpu_has_llsc) { in atomic_add_return()
194 if (cpu_has_llsc && R10000_LLSC_WAR) { in atomic_sub_return()
208 } else if (cpu_has_llsc) { in atomic_sub_return()
254 if (cpu_has_llsc && R10000_LLSC_WAR) { in atomic_sub_if_positive()
272 } else if (cpu_has_llsc) { in atomic_sub_if_positive()
[all …]
Dbitops.h64 if (cpu_has_llsc && R10000_LLSC_WAR) { in set_bit()
87 } else if (cpu_has_llsc) { in set_bit()
129 if (cpu_has_llsc && R10000_LLSC_WAR) { in clear_bit()
152 } else if (cpu_has_llsc) { in clear_bit()
205 if (cpu_has_llsc && R10000_LLSC_WAR) { in change_bit()
218 } else if (cpu_has_llsc) { in change_bit()
263 if (cpu_has_llsc && R10000_LLSC_WAR) { in test_and_set_bit()
278 } else if (cpu_has_llsc) { in test_and_set_bit()
331 if (cpu_has_llsc && R10000_LLSC_WAR) { in test_and_set_bit_lock()
346 } else if (cpu_has_llsc) { in test_and_set_bit_lock()
[all …]
Dfutex.h21 if (cpu_has_llsc && R10000_LLSC_WAR) { \
47 } else if (cpu_has_llsc) { \
142 if (cpu_has_llsc && R10000_LLSC_WAR) { in futex_atomic_cmpxchg_inatomic()
169 } else if (cpu_has_llsc) { in futex_atomic_cmpxchg_inatomic()
Dsystem.h87 if (cpu_has_llsc && R10000_LLSC_WAR) { in __xchg_u32()
102 } else if (cpu_has_llsc) { in __xchg_u32()
139 if (cpu_has_llsc && R10000_LLSC_WAR) { in __xchg_u64()
152 } else if (cpu_has_llsc) { in __xchg_u64()
Dlocal.h32 if (cpu_has_llsc && R10000_LLSC_WAR) { in local_add_return()
46 } else if (cpu_has_llsc) { in local_add_return()
77 if (cpu_has_llsc && R10000_LLSC_WAR) { in local_sub_return()
91 } else if (cpu_has_llsc) { in local_sub_return()
Dcmpxchg.h19 if (cpu_has_llsc && R10000_LLSC_WAR) { \
36 } else if (cpu_has_llsc) { \
Dcpu-features.h80 #ifndef cpu_has_llsc
81 #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) macro
/arch/mips/include/asm/mach-malta/
Dcpu-feature-overrides.h32 #define cpu_has_llsc 1 macro
34 #define cpu_has_llsc 0 macro
61 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-mipssim/
Dcpu-feature-overrides.h30 #define cpu_has_llsc 1 macro
55 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-ip32/
Dcpu-feature-overrides.h21 #define cpu_has_llsc 0 macro
23 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-cobalt/
Dcpu-feature-overrides.h35 #define cpu_has_llsc 0 macro
37 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-tx49xx/
Dcpu-feature-overrides.h4 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-ip22/
Dcpu-feature-overrides.h27 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-excite/
Dcpu-feature-overrides.h25 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-yosemite/
Dcpu-feature-overrides.h24 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-sibyte/
Dcpu-feature-overrides.h24 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-rm/
Dcpu-feature-overrides.h28 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-ip28/
Dcpu-feature-overrides.h25 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-ip27/
Dcpu-feature-overrides.h24 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-rc32434/
Dcpu-feature-overrides.h48 #define cpu_has_llsc 1 macro
/arch/mips/include/asm/mach-cavium-octeon/
Dcpu-feature-overrides.h39 #define cpu_has_llsc 1 macro
/arch/mips/kernel/
Dtraps.c814 if (!cpu_has_llsc && status < 0) in do_ri()
887 if (!cpu_has_llsc && status < 0) in do_cpu()