Home
last modified time | relevance | path

Searched refs:cval (Results 1 – 3 of 3) sorted by relevance

/arch/powerpc/platforms/embedded6xx/
Dls_uart.c60 unsigned char cval = UART_LCR_WLEN8; in avr_uart_configure() local
66 out_8(avr_addr + UART_LCR, cval); /* initialise UART */ in avr_uart_configure()
70 cval |= UART_LCR_STOP | UART_LCR_PARITY | UART_LCR_EPAR; in avr_uart_configure()
72 out_8(avr_addr + UART_LCR, cval); /* Set character format */ in avr_uart_configure()
74 out_8(avr_addr + UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ in avr_uart_configure()
77 out_8(avr_addr + UART_LCR, cval); /* reset DLAB */ in avr_uart_configure()
/arch/arm/mach-omap2/
Dclock24xx.c114 u32 cval, apll_mask; in omap2_clk_fixed_enable() local
118 cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN); in omap2_clk_fixed_enable()
120 if ((cval & apll_mask) == apll_mask) in omap2_clk_fixed_enable()
123 cval &= ~apll_mask; in omap2_clk_fixed_enable()
124 cval |= apll_mask; in omap2_clk_fixed_enable()
125 cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); in omap2_clk_fixed_enable()
128 cval = OMAP24XX_ST_96M_APLL; in omap2_clk_fixed_enable()
130 cval = OMAP24XX_ST_54M_APLL; in omap2_clk_fixed_enable()
132 omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval, in omap2_clk_fixed_enable()
145 u32 cval; in omap2_clk_fixed_disable() local
[all …]
Dclock.h51 int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);