/arch/m68k/include/asm/ |
D | entry_no.h | 73 moveml %d1-%d5/%a0-%a2,%sp@ 83 moveml %d1-%d5/%a0-%a2,%sp@ 94 moveml %sp@,%d1-%d5/%a0-%a2 105 moveml %sp@,%d1-%d5/%a0-%a2 122 moveml %d1-%d5/%a0-%a2,%sp@ 126 moveml %sp@,%d1-%d5/%a0-%a2 161 moveml %d1-%d5/%a0-%a2,%sp@- 165 moveml %sp@+,%a0-%a2/%d1-%d5
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D | entry_mm.h | 77 moveml %d1-%d5/%a0-%a1/%curptr,%sp@- 84 moveml %d1-%d5/%a0-%a1/%curptr,%sp@- 88 moveml %sp@+,%a0-%a1/%curptr/%d1-%d5
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D | a.out-core.h | 46 dump->regs.d5 = regs->d5; in aout_dump_thread()
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D | user.h | 40 long d1,d2,d3,d4,d5,d6,d7; member
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D | ptrace.h | 34 long d5; member
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D | elf_no.h | 78 pr_reg[4] = regs->d5; \
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D | processor_no.h | 104 (_regs)->d5 = current->mm->start_data; \
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D | elf_mm.h | 86 pr_reg[4] = regs->d5; \
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/arch/m68k/ifpsp060/src/ |
D | ilsp.S | 138 mov.l 0xc(%a6), %d5 # get dividend hi 155 tst.l %d5 # chk sign of hi(dividend) 161 negx.l %d5 167 tst.l %d5 # is (hi(dividend) == 0) 176 exg %d5,%d6 # q = 0, r = dividend 180 tdivu.l %d7, %d5:%d6 # it's only a 32/32 bit div! 201 neg.l %d5 # sgn(rem) = sgn(dividend) 275 # The most sig. longword of the 64 bit dividend must be in %d5, least # 278 # The quotient is returned in %d6, remainder in %d5, unless the # 299 swap %d5 # same as r*b if previous step rqd [all …]
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/arch/m68k/fpsp040/ |
D | binstr.S | 26 | Copy the fraction in d2:d3 to d4:d5. 32 | A4. Multiply the fraction in d4:d5 by 2 using shifts. The msb 35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5 54 | d5: lower 32-bits of fraction for mul by 2 81 | A2. Copy d2:d3 to d4:d5. Start loop. 85 movel %d3,%d5 |to d4:d5 95 | A4. Multiply d4:d5 by 2; add carry out to d1. 97 asll #1,%d5 |mul d5 by 2 104 addl %d5,%d3 |add lower 32 bits
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D | bindec.S | 117 | d5: LAMBDA/ICTR 228 | d5: x/x 271 | loop entry A6. The lower word of d5 is used for ICTR. 273 clrw %d5 |clear ICTR 291 | d5: ICTR/Unchanged 363 | d5: 0/ICTR:LAMBDA 387 swap %d5 |use upper word of d5 for LAMBDA 388 clrw %d5 |set it zero initially 392 addqw #1,%d5 |if neg, set LAMBDA true 403 addw %d5,%d1 |add in LAMBDA [all …]
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D | sgetem.S | 126 moveml %d3/%d5/%d6,-(%a7) |save registers 131 movel #32,%d5 132 subl %d3,%d5 |sub 32 from shift for ls mant 133 lsrl %d5,%d6 |shift off all bits but those that will 136 moveml (%a7)+,%d3/%d5/%d6 |restore registers
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D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y| 127 movel %d5,%d4 128 clrl %d5 142 movel %d5,%d7 | ...a copy of D5 143 lsll %d6,%d5 229 cmpl %d5,%d2 | ...compare lo(R) and lo(Y) 242 subl %d5,%d2 | ...lo(R) - lo(Y) 307 movel %d5,Y_Lo(%a6) 323 movel %d5,Y_Lo(%a6) 341 cmpl %d5,%d2
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/arch/m68knommu/lib/ |
D | mulsi3.S | 77 #define d5 REG (d5) macro
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D | umodsi3.S | 77 #define d5 REG (d5) macro
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D | modsi3.S | 77 #define d5 REG (d5) macro
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D | divsi3.S | 77 #define d5 REG (d5) macro
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D | udivsi3.S | 77 #define d5 REG (d5) macro
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/arch/m68k/kernel/ |
D | head.S | 1673 movel #ROOT_TABLE_SIZE,%d5 1676 subql #1,%d5 | they (might) work 1678 1: tstl %d5 1680 subq #1,%d5 1737 movel %a4,%d5 1738 addil #PAGESIZE<<13,%d5 1749 movel %a4,%d5 1750 addil #PAGESIZE<<6,%d5 1761 movel %a4,%d5 1762 addil #PAGESIZE,%d5 [all …]
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D | asm-offsets.c | 53 DEFINE(PT_D5, offsetof(struct pt_regs, d5)); in main()
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/arch/m68knommu/platform/coldfire/ |
D | entry.S | 127 moveml %sp@,%d1-%d5/%a0-%a2 147 moveml %sp@,%d1-%d5/%a0-%a2
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/arch/m68knommu/kernel/ |
D | process.c | 112 regs->a0, regs->d5, regs->d4); in show_regs() 315 fp->d4, fp->d5, fp->a0, fp->a1); in dump()
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D | asm-offsets.c | 57 DEFINE(PT_D5, offsetof(struct pt_regs, d5)); in main()
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/arch/m68k/math-emu/ |
D | fp_entry.S | 150 move.l %d5,%d0 203 | move.l %d0,%d5
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/arch/m68k/mac/ |
D | macints.c | 436 fp->d4, fp->d5, fp->a0, fp->a1); in mac_nmi_handler()
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