| /arch/arm/lib/ |
| D | lib1funcs.S | 40 .macro ARM_DIV_BODY dividend, divisor, result, curbit
44 clz \curbit, \divisor
48 mov \divisor, \divisor, lsl \result
54 @ Initially shift the divisor left 3 bits if possible,
58 tst \divisor, #0xe0000000
59 moveq \divisor, \divisor, lsl #3
63 @ Unless the divisor is very big, shift it up in multiples of
65 @ division loop. Continue shifting until the divisor is
67 1: cmp \divisor, #0x10000000
68 cmplo \divisor, \dividend
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| D | div64.S | 50 bls 9f @ divisor is 0 or 1
52 beq 8f @ divisor is power of 2
59 @ Align divisor with upper part of dividend.
60 @ The aligned divisor is stored in yl preserving the original.
102 @ divisor for comparisons, considering the carry-out bit as well.
139 @ divisor at this point since divisor can not be smaller than 3 here.
147 8: @ Division by a power of 2: determine what that divisor order is
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| /arch/arm/plat-s3c/ |
| D | pwm-clock.c | 96 unsigned long divisor = parent_rate / rate; in clk_pwm_scaler_round_rate() local
98 if (divisor > 256) in clk_pwm_scaler_round_rate()
99 divisor = 256; in clk_pwm_scaler_round_rate()
100 else if (divisor < 2) in clk_pwm_scaler_round_rate()
101 divisor = 2; in clk_pwm_scaler_round_rate()
103 return parent_rate / divisor; in clk_pwm_scaler_round_rate()
110 unsigned long divisor; in clk_pwm_scaler_set_rate() local
113 divisor = clk_get_rate(clk->parent) / round; in clk_pwm_scaler_set_rate()
114 divisor--; in clk_pwm_scaler_set_rate()
121 tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT; in clk_pwm_scaler_set_rate()
[all …]
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| /arch/alpha/lib/ |
| D | divide.S | 54 #define divisor $1 macro
102 bis $25,$25,divisor
107 LONGIFY(divisor)
112 beq divisor, 9f /* div by zero */
123 1: cmpult divisor,modulus,compare
124 s8addq divisor,$31,divisor
128 1: cmpult divisor,modulus,compare
129 blt divisor, 2f
130 addq divisor,divisor,divisor
139 cmpule divisor,modulus,compare
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| D | ev6-divide.S | 64 #define divisor $1 macro
112 bis $25,$25,divisor # E :
118 LONGIFY(divisor) # E : U L L U
125 beq divisor, 9f /* div by zero */
142 1: cmpult divisor,modulus,compare # E :
143 s8addq divisor,$31,divisor # E :
147 1: cmpult divisor,modulus,compare # E :
150 blt divisor, 2f # U : U L U L
152 addq divisor,divisor,divisor # E :
170 cmpule divisor,modulus,compare # E :
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| /arch/sparc/kernel/ |
| D | us2e_cpufreq.c | 87 unsigned long old_divisor, unsigned long divisor) in frob_mem_refresh() argument
92 refr_count /= (MCTRL0_REFR_CLKS_P_CNT * divisor * 1000000000UL); in frob_mem_refresh()
119 unsigned long old_divisor, unsigned long divisor) in us2e_transition() argument
128 if (old_divisor == 2 && divisor == 1) { in us2e_transition()
131 frob_mem_refresh(0, clock_tick, old_divisor, divisor); in us2e_transition()
132 } else if (old_divisor == 1 && divisor == 2) { in us2e_transition()
133 frob_mem_refresh(1, clock_tick, old_divisor, divisor); in us2e_transition()
136 } else if (old_divisor == 1 && divisor > 2) { in us2e_transition()
140 2, divisor); in us2e_transition()
141 } else if (old_divisor > 2 && divisor == 1) { in us2e_transition()
[all …]
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| /arch/x86/include/asm/ |
| D | div64.h | 36 static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder) in div_u64_rem() argument
46 if (upper >= divisor) { in div_u64_rem()
47 d.v32[1] = upper / divisor; in div_u64_rem()
48 upper %= divisor; in div_u64_rem()
51 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in div_u64_rem()
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| /arch/powerpc/boot/ |
| D | div64.S | 26 divwu r7,r5,r4 # if dividend.hi >= divisor,
27 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
28 subf. r5,r0,r5 # dividend.hi %= divisor
35 srw r10,r10,r0 # the divisor right the same amount,
44 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
45 subfc r6,r10,r6 # take the product from the divisor,
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| D | virtex.c | 32 u16 divisor; in virtex_ns16550_console_init() local
55 divisor = clk / (16 * spd); in virtex_ns16550_console_init()
61 out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); in virtex_ns16550_console_init()
62 out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); in virtex_ns16550_console_init()
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| /arch/mips/lemote/lm2e/ |
| D | dbg_io.c | 97 u32 divisor; in debugInit() local
107 divisor = MAX_BAUD / baud; in debugInit()
108 UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); in debugInit()
109 UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); in debugInit()
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| /arch/powerpc/lib/ |
| D | div64.S | 26 divwu r7,r5,r4 # if dividend.hi >= divisor,
27 mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
28 subf. r5,r0,r5 # dividend.hi %= divisor
35 srw r10,r10,r0 # the divisor right the same amount,
45 mulhwu r9,r11,r4 # multiply the estimate by the divisor,
46 subfc r6,r10,r6 # take the product from the divisor,
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| /arch/sh/kernel/timers/ |
| D | timer-cmt.c | 117 u8 divisor = CMT_CMCSR_INIT & 0x3; in cmt_clk_init() local
121 clk->rate = clk->parent->rate / (8 << (divisor << 1)); in cmt_clk_init()
126 u8 divisor = ctrl_inw(CMT_CMCSR_0) & 0x3; in cmt_clk_recalc() local
127 clk->rate = clk->parent->rate / (8 << (divisor << 1)); in cmt_clk_recalc()
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| D | timer-tmu.c | 163 u8 divisor = TMU_TCR_INIT & 0x7; in tmu_clk_init() local
166 clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1)); in tmu_clk_init()
174 u8 divisor = ctrl_inw(TMU0_TCR+tmu_num*0xC) & 0x7; in tmu_clk_recalc() local
175 clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1)); in tmu_clk_recalc()
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| /arch/sh/kernel/cpu/sh4/ |
| D | clock-sh4-202.c | 32 int divisor = clk->parent->rate / rate; in frqcr3_lookup() local
36 if (frqcr3_divisors[i] == divisor) in frqcr3_lookup()
83 int divisor = frqcr3_divisors[i]; in shoc_clk_init() local
86 divisor, 0) == 0) in shoc_clk_init()
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| /arch/arm/mach-orion5x/ |
| D | tsx09-common.c | 30 const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200)); in qnap_tsx09_power_off() local
36 writel(divisor & 0xff, UART1_REG(DLL)); in qnap_tsx09_power_off()
37 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in qnap_tsx09_power_off()
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| D | terastation_pro2-setup.c | 276 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400)); in tsp2_power_off() local
282 writel(divisor & 0xff, UART1_REG(DLL)); in tsp2_power_off()
283 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in tsp2_power_off()
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| D | kurobox_pro-setup.c | 296 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400)); in kurobox_pro_power_off() local
302 writel(divisor & 0xff, UART1_REG(DLL)); in kurobox_pro_power_off()
303 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in kurobox_pro_power_off()
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| /arch/powerpc/sysdev/qe_lib/ |
| D | qe.c | 197 u32 divisor, tempval; in qe_setbrg() local
203 divisor = qe_get_brg_clk() / (rate * multiplier); in qe_setbrg()
205 if (divisor > QE_BRGC_DIVISOR_MAX + 1) { in qe_setbrg()
207 divisor /= 16; in qe_setbrg()
213 if (!div16 && (divisor & 1)) in qe_setbrg()
214 divisor++; in qe_setbrg()
216 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | in qe_setbrg()
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| /arch/arm/mach-pxa/ |
| D | viper.c | 152 unsigned int divisor = 0; in viper_set_core_cpu_voltage() local
156 v = "1.0"; divisor = 0xfff; in viper_set_core_cpu_voltage()
158 v = "1.1"; divisor = 0xde5; in viper_set_core_cpu_voltage()
160 v = "1.3"; divisor = 0x325; in viper_set_core_cpu_voltage()
171 step = divisor; in viper_set_core_cpu_voltage()
172 else if (current_voltage_divisor < divisor - STEP) in viper_set_core_cpu_voltage()
174 else if (current_voltage_divisor > divisor + STEP) in viper_set_core_cpu_voltage()
177 step = divisor; in viper_set_core_cpu_voltage()
202 } while (current_voltage_divisor != divisor); in viper_set_core_cpu_voltage()
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| /arch/s390/lib/ |
| D | qrnnd.S | 6 # r5 : divisor d
16 ltr %r2,%r5 # reload and test divisor
18 # divisor >= 0x80000000
56 5: # divisor < 0x80000000
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| /arch/m68k/ifpsp060/src/ |
| D | ilsp.S | 74 # 0x4(sp) = divisor #
89 # codes before performing the final "rts". If the divisor was equal to #
134 mov.l 0x8(%a6),%d7 # fetch divisor
136 beq.w ldiv64eq0 # divisor is = 0!!!
145 # save the sign of the divisor
146 # make divisor unsigned if it's negative
165 # - is (hi(dividend) == 0 && (divisor <= lo(dividend))) ? (32-bit div)
173 cmp.l %d7,%d6 # is (divisor <= lo(dividend))
272 # where U,V are words of the quadword dividend and longword divisor, #
276 # in %d6. The divisor must be in the variable ddivisor, and the #
[all …]
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| /arch/powerpc/kernel/ |
| D | udbg_16550.c | 118 unsigned int dll, dlm, divisor, prescaler, speed; in udbg_probe_uart_speed() local
130 divisor = dlm << 8 | dll; in udbg_probe_uart_speed()
142 speed = (clock / prescaler) / (divisor * 16); in udbg_probe_uart_speed()
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| D | time.c | 1103 unsigned divisor, struct div_result *dr) in div128_by_32() argument
1114 w = a / divisor; in div128_by_32()
1115 ra = ((u64)(a - (w * divisor)) << 32) + b; in div128_by_32()
1117 rb = ((u64) do_div(ra, divisor) << 32) + c; in div128_by_32()
1120 rc = ((u64) do_div(rb, divisor) << 32) + d; in div128_by_32()
1123 do_div(rc, divisor); in div128_by_32()
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| /arch/arm/mach-w90x900/include/mach/ |
| D | regs-serial.h | 37 unsigned int divisor; member
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| /arch/arm/mach-s3c2440/ |
| D | mach-at2440evb.c | 63 .divisor = 1,
69 .divisor = 1,
|