| /arch/sparc/lib/ |
| D | U1memcpy.S | 65 #define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
68 faligndata %f3, %f4, %f52; \
69 faligndata %f4, %f5, %f54; \
175 EX_LD(LOAD(ldd, %o1, %f4))
179 faligndata %f4, %f6, %f0
184 EX_LD(LOAD(ldd, %o1 + 0x8, %f4))
187 faligndata %f6, %f4, %f0
236 1: FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
250 FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
252 3: FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16)
[all …]
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| D | NG2memcpy.S | 85 faligndata %x2, %x3, %f4; \
100 fmovd %x2, %f4;
104 fmovd %x2, %f4; \
109 fmovd %x2, %f4; \
115 fmovd %x2, %f4; \
122 fmovd %x2, %f4; \
130 fmovd %x2, %f4; \
280 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f14, f16)
291 FREG_LOAD_7(%g2, f0, f2, f4, f6, f8, f10, f12)
294 FREG_FROB(f0, f2, f4, f6, f8, f10, f12, f16, f18)
[all …]
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| D | U3memcpy.S | 135 EX_LD(LOAD(ldd, %o1, %f4))
139 faligndata %f4, %f6, %f0
144 EX_LD(LOAD(ldd, %o1 + 0x8, %f4))
147 faligndata %f6, %f4, %f2
162 EX_LD(LOAD(ldd, %o1 + 0x010, %f4))
166 faligndata %f2, %f4, %f18
168 faligndata %f4, %f6, %f20
189 EX_LD(LOAD(ldd, %o1 + 0x010, %f4))
197 faligndata %f2, %f4, %f18
199 faligndata %f4, %f6, %f20
[all …]
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| D | copy_page.S | 105 ldd [%o1 + 0x010], %f4
111 fmovd %f4, %f20
121 ldd [%o1 + 0x050], %f4
129 fmovd %f4, %f20
144 ldd [%o1 + 0x050], %f4
152 fmovd %f4, %f20
181 1: TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
202 TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
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| D | xor.S | 45 fxor %f4, %f20, %f20
72 fxor %f4, %f20, %f20
117 fxor %f4, %f20, %f52
142 fxor %f4, %f20, %f52
185 fxor %f4, %f20, %f20
220 fxor %f4, %f20, %f20
273 fxor %f4, %f20, %f52
318 fxor %f4, %f20, %f52
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| D | clear_page.S | 80 faddd %f0, %f2, %f4
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| /arch/mips/include/asm/ |
| D | fpregdef.h | 31 #define ft0 $f4 /* caller saved */
72 #define ft0 $f4 /* caller saved */
|
| D | asmmacro-32.h | 19 sdc1 $f4, THREAD_FPR4(\thread)
42 swc1 $f4, THREAD_FPR4(\thread)
77 ldc1 $f4, THREAD_FPR4(\thread)
100 lwc1 $f4, THREAD_FPR4(\thread)
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| D | asmmacro-64.h | 20 sdc1 $f4, THREAD_FPR4(\thread)
68 ldc1 $f4, THREAD_FPR4(\thread)
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| /arch/mips/kernel/ |
| D | r6000_fpu.S | 32 sdc1 $f4,(SC_FPREGS+32)(a0)
69 ldc1 $f4,(SC_FPREGS+32)(a0)
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| D | r4k_fpu.S | 61 EX sdc1 $f4, SC_FPREGS+32(a0)
87 EX sdc1 $f4, SC32_FPREGS+32(a0)
137 EX ldc1 $f4, SC_FPREGS+32(a0)
162 EX ldc1 $f4, SC32_FPREGS+32(a0)
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| D | r2300_fpu.S | 37 EX(swc1 $f4,(SC_FPREGS+32)(a0))
89 EX(lwc1 $f4,(SC_FPREGS+32)(a0))
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| D | r4k_switch.S | 207 mtc1 t1, $f4
239 dmtc1 t1, $f4
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| D | r2300_switch.S | 144 mtc1 t0, $f4
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| /arch/sparc/kernel/ |
| D | fpu_traps.S | 35 faddd %f0, %f2, %f4
67 faddd %f0, %f2, %f4
253 fitod %f4, %f62
296 fdtos %f62, %f4
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| D | entry.S | 1369 std %f4, [%o0 + 0x10]
1404 ldd [%o0 + 0x10], %f4
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| /arch/ia64/include/asm/ |
| D | ptrace.h | 187 struct ia64_fpreg f4; /* preserved */ member
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| /arch/ia64/kernel/ |
| D | entry.h | 45 .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
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| D | mca_asm.S | 552 stf.spill [temp1]=f4,32
711 ldf.fill f4=[temp1],32
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| D | asm-offsets.c | 138 DEFINE(IA64_SWITCH_STACK_F4_OFFSET, offsetof (struct switch_stack, f4)); in foo()
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| D | entry.S | 101 mov r6=0; mov f4=f0; mov b3=r0
318 stf.spill [r2]=f4,32
420 ldf.fill f4=[r14],32
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| D | head.S | 139 stf.spill.nta [_reg1]=f4,16;; \
1283 ldf.fill.nta f4=[r25],16;;
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| /arch/alpha/kernel/ |
| D | entry.S | 489 stt $f4, 96($sp)
539 ldt $f4, 96($sp)
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| /arch/sparc/include/asm/ |
| D | hypervisor.h | 1224 unsigned long f4; /* Entry specific */ member
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| /arch/ia64/kvm/ |
| D | trampoline.S | 493 stf.spill.nta [r2]=f4,32; \
698 ldf.fill.nta f4 = [r2], 32; \
|