/arch/ia64/lib/ |
D | idiv64.S | 43 setf.sig f9 = in1 47 INT_TO_FP(f9, f9) 49 frcpa.s1 f11, p6 = f8, f9 // y0 = frcpa(b) 52 (p6) fnma.s1 f6 = f9, f11, f1 // e0 = -b*y0 + 1 64 (p6) fnma.s1 f7 = f9, f10, f8 // r = -b*q2 + a 68 setf.sig f9 = in1 // f9 = -b 75 xma.l f11 = f11, f9, f8 // r = q*(-b) + a
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D | idiv32.S | 49 setf.sig f9 = in1 56 INT_TO_FP(f9, f9) 59 frcpa.s1 f6, p6 = f8, f9 // y0 = frcpa(b) 62 (p6) fnma.s1 f6 = f9, f6, f1 // e0 = -b*y0 + 1 65 setf.sig f9 = in1 // f9 = -b 78 xma.l f6 = f6, f9, f7 // r = q*(-b) + a
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/arch/mips/include/asm/ |
D | fpregdef.h | 36 #define ft2f $f9 77 #define ft5 $f9
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D | asmmacro-64.h | 42 sdc1 $f9, THREAD_FPR9(\thread) 90 ldc1 $f9, THREAD_FPR9(\thread)
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D | asmmacro-32.h | 47 swc1 $f9, THREAD_FPR9(\thread) 105 lwc1 $f9, THREAD_FPR9(\thread)
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/arch/mips/kernel/ |
D | r2300_fpu.S | 42 EX(swc1 $f9,(SC_FPREGS+72)(a0)) 94 EX(lwc1 $f9,(SC_FPREGS+72)(a0))
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D | r4k_switch.S | 187 dmtc1 t1, $f9 212 mtc1 t1, $f9
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D | r4k_fpu.S | 44 EX sdc1 $f9, SC_FPREGS+72(a0) 122 EX ldc1 $f9, SC_FPREGS+72(a0)
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D | r2300_switch.S | 149 mtc1 t0, $f9
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/arch/ia64/kernel/ |
D | gate.S | 231 stf.spill [base1]=f9,32 259 ldf.fill f9=[base1],32
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D | head.S | 1059 setf.sig f9=r9 // certain to stall, so issue it _after_ ldf8... 1061 xmpy.lu f10=f9,f8 // calculate low 64 bits of 128-bit product (4 cyc) 1062 xmpy.hu f11=f9,f8 // calculate high 64 bits of 128-bit product 1078 setf.sig f9=r32 1080 xmpy.lu f10=f9,f8 // calculate low 64 bits of 128-bit product (4 cyc) 1081 xmpy.hu f11=f9,f8 // calculate high 64 bits of 128-bit product
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D | process.c | 132 regs->f9.u.bits[1], regs->f9.u.bits[0]); in show_regs()
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D | minstate.h | 201 stf.spill [r3]=f9,32; \
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D | entry.S | 533 stf.spill [r17]=f9,32 550 ldf.fill f9=[r17],32 818 mov f9=f0 // F clear f9 966 ldf.fill f9=[r2],PT(F6)-PT(F9) 1333 stf.spill [r17]=f9,32
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D | mca_asm.S | 537 stf.spill [temp1]=f9,PT(F11)-PT(F9) 791 ldf.fill f9=[temp2],PT(F11)-PT(F9)
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D | asm-offsets.c | 128 DEFINE(IA64_PT_REGS_F9_OFFSET, offsetof (struct pt_regs, f9)); in foo()
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/arch/ia64/include/asm/ |
D | ptrace.h | 171 struct ia64_fpreg f9; /* scratch */ member
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D | kvm_host.h | 552 struct ia64_fpreg f9; /* scratch */ member
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/arch/sparc/kernel/ |
D | fpu_traps.S | 258 fitod %f9, %f62 301 fdtos %f62, %f9
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/arch/ia64/kvm/ |
D | asm-offsets.c | 170 offsetof(struct kvm_pt_regs, f9)); in foo()
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D | trampoline.S | 500 stf.spill.nta [r3]=f9,32; \ 705 ldf.fill.nta f9 = [r3], 32; \
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D | vmm_ivt.S | 398 stf.spill [r3]=f9,32 996 ldf.fill f9=[r2],PT(F6)-PT(F9)
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/arch/alpha/kernel/ |
D | entry.S | 494 stt $f9, 136($sp) 544 ldt $f9, 136($sp)
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/arch/ia64/ia32/ |
D | ia32_signal.c | 261 ia64f2ia32f(fpregp, &ptp->f9); in save_ia32_fpstate_live() 395 ia32f2ia64f(&ptp->f9, fpregp); in restore_ia32_fpstate_live()
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/arch/sparc/lib/ |
D | U1memcpy.S | 65 #define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument 73 faligndata %f8, %f9, %f62;
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