Home
last modified time | relevance | path

Searched refs:ir (Results 1 – 11 of 11) sorted by relevance

/arch/mips/math-emu/
Dcp1emu.c206 mips_instruction ir; in cop1Emulate() local
210 if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { in cop1Emulate()
216 if ((xcp->cp0_cause & CAUSEF_BD) && !isBranchInstr(&ir)) in cop1Emulate()
241 if (get_user(ir, (mips_instruction __user *) emulpc)) { in cop1Emulate()
256 switch (MIPSInst_OPCODE(ir)) { in cop1Emulate()
258 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
259 MIPSInst_SIMM(ir)); in cop1Emulate()
267 DITOREG(val, MIPSInst_RT(ir)); in cop1Emulate()
272 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
273 MIPSInst_SIMM(ir)); in cop1Emulate()
[all …]
Ddsemul.c53 int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc) in mips_dsemul() argument
59 if (ir == 0) { /* a nop is easy */ in mips_dsemul()
95 err = __put_user(ir, &fr->emul); in mips_dsemul()
/arch/parisc/math-emu/
Dfpudispatch.c194 fpudispatch(u_int ir, u_int excp_code, u_int holder, u_int fpregs[]) in fpudispatch() argument
206 class = get_class(ir); in fpudispatch()
209 subop = get_subop1_PA2_0(ir); in fpudispatch()
211 subop = get_subop1_PA1_1(ir); in fpudispatch()
214 subop = get_subop(ir); in fpudispatch()
221 return(decode_0c(ir,class,subop,fpregs)); in fpudispatch()
223 return(decode_0e(ir,class,subop,fpregs)); in fpudispatch()
225 return(decode_06(ir,fpregs)); in fpudispatch()
227 return(decode_26(ir,fpregs)); in fpudispatch()
229 return(decode_2e(ir,fpregs)); in fpudispatch()
[all …]
/arch/mips/include/asm/
Dfpu_emulator.h40 extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
/arch/powerpc/sysdev/
Dppc4xx_gpio.c45 __be32 ir; member
80 return in_be32(&regs->ir) & GPIO_MASK(gpio); in ppc4xx_gpio_get()
/arch/ia64/include/asm/
Dkvm_host.h284 unsigned long ir : 1; member
Dprocessor.h134 __u64 ir : 1; member
/arch/powerpc/boot/dts/
Dwalnut.dts191 ir@3,0 {
Debony.dts186 ir@3,0 {
/arch/ia64/kvm/
Dprocess.c150 pt_isr.ir = 0; in inject_guest_interruption()
Dvcpu.c1074 visr.ir = pt_isr.ir; in vcpu_tpa()