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/arch/arm/mach-sa1100/
Dcpu-sa1110.c53 u_int mdcas[3]; member
128 static inline void set_mdcas(u_int *mdcas, int delayed, u_int rcd) in set_mdcas() argument
135 mdcas[0] = (1 << rcd) - 1; in set_mdcas()
136 mdcas[0] |= 0x55555555 << shift; in set_mdcas()
137 mdcas[1] = mdcas[2] = 0x55555555 << (shift & 1); in set_mdcas()
183 set_mdcas(sd->mdcas, sd_khz >= 62000, ns_to_cycles(sdram->trcd, mem_khz)); in sdram_calculate_timing()
187 sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], sd->mdcas[2]); in sdram_calculate_timing()
265 sd.mdcas[0] = 0xaaaaaa7f; in sa1110_target()
268 sd.mdcas[0] = 0xaaaaaa9f; in sa1110_target()
270 sd.mdcas[1] = 0xaaaaaaaa; in sa1110_target()
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