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Searched refs:mdcnfg (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-sa1100/
Dcpu-sa1110.c51 u_int mdcnfg; member
160 sd->mdcnfg = MDCNFG & 0x007f007f; in sdram_calculate_timing()
169 sd->mdcnfg |= trp << 8; in sdram_calculate_timing()
170 sd->mdcnfg |= trp << 24; in sdram_calculate_timing()
171 sd->mdcnfg |= sdram->cas_latency << 12; in sdram_calculate_timing()
172 sd->mdcnfg |= sdram->cas_latency << 28; in sdram_calculate_timing()
173 sd->mdcnfg |= twr << 14; in sdram_calculate_timing()
174 sd->mdcnfg |= twr << 30; in sdram_calculate_timing()
187 sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], sd->mdcas[2]); in sdram_calculate_timing()
313 : "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg), in sa1110_target()
Dcpu-sa1100.c99 u32 mdcnfg; member
162 MDCNFG = settings->mdcnfg; in sa1100_update_dram_timings()
177 MDCNFG = settings->mdcnfg; in sa1100_update_dram_timings()
/arch/arm/mach-pxa/
Dcpufreq-pxa2xx.c76 #define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3) argument
77 #define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3) argument
200 uint32_t mdcnfg = MDCNFG; in init_sdram_rows() local
203 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3)) in init_sdram_rows()
204 drac2 = MDCNFG_DRAC2(mdcnfg); in init_sdram_rows()
206 if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1)) in init_sdram_rows()
207 drac0 = MDCNFG_DRAC0(mdcnfg); in init_sdram_rows()