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Searched refs:operation (Results 1 – 25 of 42) sorted by relevance

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/arch/cris/arch-v32/drivers/
Dcryptocop.c225 …t cryptocop_job_queue_insert(cryptocop_queue_priority prio, struct cryptocop_operation *operation);
226 …tic int cryptocop_job_setup(struct cryptocop_prio_job **pj, struct cryptocop_operation *operation);
529 static int create_input_descriptors(struct cryptocop_operation *operation, struct cryptocop_tfrm_ct… in create_input_descriptors() argument
544 …if (((tc->produced + tc->tcfg->inject_ix) > operation->tfrm_op.outlen) || (tc->produced && (operat… in create_input_descriptors()
549 …while ((outiov_ix < operation->tfrm_op.outcount) && ((out_ix + operation->tfrm_op.outdata[outiov_i… in create_input_descriptors()
550 out_ix += operation->tfrm_op.outdata[outiov_ix].iov_len; in create_input_descriptors()
553 if (outiov_ix >= operation->tfrm_op.outcount){ in create_input_descriptors()
561 while ((out_length > 0) && (outiov_ix < operation->tfrm_op.outcount)) { in create_input_descriptors()
569 rem_length = operation->tfrm_op.outdata[outiov_ix].iov_len - iov_offset; in create_input_descriptors()
576 …outiov_ix, rem_length, dlength, iov_offset, operation->tfrm_op.outdata[outiov_ix].iov_len, operati… in create_input_descriptors()
[all …]
/arch/cris/include/arch-v32/arch/
Dcryptocop.h264 int cryptocop_job_queue_insert_csum(struct cryptocop_operation *operation);
266 int cryptocop_job_queue_insert_crypto(struct cryptocop_operation *operation);
268 int cryptocop_job_queue_insert_user_job(struct cryptocop_operation *operation);
/arch/avr32/mm/
Dcache.c126 asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len) in sys_cacheflush() argument
140 switch (operation) { in sys_cacheflush()
/arch/arm/mach-omap2/
Dsram243x.S44 mov r3, #0x1 @ value for 1x operation
45 str r3, [r2] @ go to L1-freq operation
72 mov r3, #0x2 @ value for 2x operation
73 str r3, [r2] @ go to L0-freq operation
107 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
201 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
Dsram242x.S44 mov r3, #0x1 @ value for 1x operation
45 str r3, [r2] @ go to L1-freq operation
72 mov r3, #0x2 @ value for 2x operation
73 str r3, [r2] @ go to L0-freq operation
107 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
201 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
/arch/m68k/fpsp040/
Dslog2.S32 | Step 0. If X < 0, create a NaN and raise the invalid operation
47 | Step 0. If X < 0, create a NaN and raise the invalid operation
61 | Step 0. If X < 0, create a NaN and raise the invalid operation
76 | Step 0. If X < 0, create a NaN and raise the invalid operation
Dsacos.S34 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
Dbindec.S37 | The operation in A3 above may have set INEX2.
62 | The operation in A3 above may have set INEX2.
63 | RZ mode is forced for the scaling operation to insure
78 | Perform FINT operation in the user's rounding mode.
86 | If the int operation results in more than LEN digits,
263 | The operation in A3 above may have set INEX2.
607 | If the int operation results in more than LEN digits,
Dsasin.S34 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
Dsatanh.S41 | 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
Ddecbin.S28 | Note: this operation can never overflow.
34 | Note: this operation can never overflow.
Dutil.S113 andil #0x7f,%d0 |clear all except operation
365 andil #0x7f,%d0 |clear all except operation
380 andil #0x007f0000,%d0 |clear all bits except the operation
Dfpsp.h238 .set aiop_bit,7 | accrued illegal operation
260 .set aiop_mask,0x00000080 | accrued illegal operation
Ddo_func.S4 | Do_func performs the unimplemented operation. The operation
/arch/m68k/hp300/
DREADME.hp30013 every packet. This doesn't make for very speedy operation.
/arch/ia64/kvm/
Dkvm_fw.c96 u64 operation; member
109 status = ia64_pal_cache_flush(args->cache_type, args->operation, in remote_pal_cache_flush()
131 args.operation = gr30; in pal_cache_flush()
/arch/mn10300/kernel/
Dswitch_to.S3 # MN10300 Context switch operation
/arch/s390/include/asm/
Ddasd.h195 unsigned char operation:3; /* cache operation mode */ member
/arch/ia64/include/asm/sn/
Dsn_sal.h652 sn_register_xp_addr_region(u64 paddr, u64 len, int operation) in sn_register_xp_addr_region() argument
656 (u64)operation, 0, 0, 0, 0); in sn_register_xp_addr_region()
671 int virtual, int operation) in sn_register_nofault_code() argument
/arch/alpha/kernel/
Dsmp.c551 send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation) in send_ipi_message() argument
557 set_bit(operation, &ipi_data[i].bits); in send_ipi_message()
/arch/m68k/ifpsp060/src/
Dpfpsp.S961 # multiply operation is the smallest possible normalized number
964 # if our emulation, after re-doing the operation, decided that
1281 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
1283 cmpi.b 1+EXC_CMDREG(%a6),&0x3a # is operation an ftst?
1425 # If the input operand to this operation was opclass two and a single
2422 # as a result of this operation emulation. A Trace exception can be #
2479 tst.w %d0 # is operation fmovem?
2561 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
2563 btst &0x4,1+EXC_CMDREG(%a6) # is operation fsincos,ftst,fcmp?
2579 # the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
[all …]
/arch/sparc/include/asm/
Dvio.h132 u8 operation; member
/arch/x86/
DKconfig.debug41 early before the console code is initialized. For normal operation
54 early before the console code is initialized. For normal operation
/arch/m68k/ifpsp060/
DCHANGES44 of the operation. This has been corrected.
/arch/sh/kernel/cpu/sh2a/
Dentry.S239 ! cpu operation mode

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