/arch/sh/kernel/cpu/sh2a/ |
D | clock-sh7201.c | 22 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable 23 #define ifc_divisors pfc_divisors 47 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 57 clk->rate = clk->parent->rate / pfc_divisors[idx]; in bus_clk_recalc()
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D | clock-sh7203.c | 25 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable 26 #define ifc_divisors pfc_divisors 52 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 62 clk->rate = clk->parent->rate / pfc_divisors[idx-2]; in bus_clk_recalc()
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D | clock-sh7206.c | 22 static const int pfc_divisors[]={1,2,3,4,6,8,12}; variable 23 #define ifc_divisors pfc_divisors 47 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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/arch/sh/kernel/cpu/sh3/ |
D | clock-sh7705.c | 31 static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; variable 35 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003]; in master_clk_init() 45 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-sh7706.c | 23 static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; variable 30 clk->rate *= pfc_divisors[idx]; in master_clk_init() 42 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-sh3.c | 27 static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; variable 34 clk->rate *= pfc_divisors[idx]; in master_clk_init() 46 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-sh7709.c | 23 static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; variable 37 clk->rate *= pfc_divisors[idx]; in master_clk_init() 49 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7770.c | 20 static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 }; variable 24 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f]; in master_clk_init() 34 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-sh7780.c | 20 static int pfc_divisors[] = { 1, 24, 24, 1 }; variable 25 clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003]; in master_clk_init() 35 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-shx3.c | 22 static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 18, 24, 32, 36, 48 }; variable 36 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK]; in master_clk_init() 46 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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D | clock-sh7785.c | 24 static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 18, variable 29 clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f]; in master_clk_init() 39 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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/arch/sh/kernel/cpu/sh4/ |
D | clock-sh4.c | 27 static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 }; variable 31 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007]; in master_clk_init() 41 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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/arch/sh/kernel/cpu/sh2/ |
D | clock-sh7619.c | 22 static const int pfc_divisors[] = {1,2,0,4}; variable 44 clk->rate = clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
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