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Searched refs:ps (Results 1 – 25 of 37) sorted by relevance

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/arch/ia64/kvm/
Dvtlb.c39 && ((va-trp->vadr) < PSIZE(trp->ps))); in __is_tr_translated()
53 ea1 = sa1 + PSIZE(trp->ps) - 1; in __is_tr_overlap()
62 void machine_tlb_purge(u64 va, u64 ps) in machine_tlb_purge() argument
64 ia64_ptcl(va, ps << 2); in machine_tlb_purge()
164 unsigned long ps, gpaddr; in vhpt_insert() local
166 ps = itir_ps(itir); in vhpt_insert()
168 gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) | in vhpt_insert()
169 (ifa & ((1UL << ps) - 1)); in vhpt_insert()
176 head->itir = rr.ps << 2; in vhpt_insert()
181 void mark_pages_dirty(struct kvm_vcpu *v, u64 pte, u64 ps) in mark_pages_dirty() argument
[all …]
Dvcpu.c994 vhpt_offset = ((vadr >> vrr.ps) << 3) & ((1UL << (vpta.size)) - 1); in vcpu_thash()
1089 *padr = (data->gpaddr >> data->ps << data->ps) | in vcpu_tpa()
1090 (vadr & (PSIZE(data->ps) - 1)); in vcpu_tpa()
1106 *padr = ((data->ppn >> (data->ps - 12)) << data->ps) in vcpu_tpa()
1107 | (vadr & (PSIZE(data->ps) - 1)); in vcpu_tpa()
1173 u64 ps, va, rid; in vcpu_itr_i() local
1176 ps = itir_ps(itir); in vcpu_itr_i()
1177 va = PAGEALIGN(ifa, ps); in vcpu_itr_i()
1190 u64 ps, va, rid; in vcpu_itr_d() local
1193 ps = itir_ps(itir); in vcpu_itr_d()
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Dvcpu.h288 #define PAGEALIGN(va, ps) CLEARLSB(va, ps) argument
436 _v.ps; })
626 if (rr.ps > PAGE_SHIFT) in vrrtomrr()
627 rr.ps = PAGE_SHIFT; in vrrtomrr()
703 extern void thash_purge_entries(struct kvm_vcpu *v, u64 va, u64 ps);
704 extern void thash_purge_entries_remote(struct kvm_vcpu *v, u64 va, u64 ps);
712 u64 ps, int is_data);
Dprocess.c165 rr1.ps = rr.ps; in vcpu_get_itir_on_fault()
754 thash_vhpt_insert(vcpu, pte, (u64)(rr.ps << 2), vadr, type); in physical_tlb_miss()
787 gppa = (vadr & ((1UL << data->ps) - 1)) in kvm_page_fault()
788 + (data->ppn >> (data->ps - 12) << data->ps); in kvm_page_fault()
926 vaddr = PAGEALIGN(vaddr, p->ps); in ptc_ga_remote_func()
927 thash_purge_entries_remote(v, vaddr, p->ps); in ptc_ga_remote_func()
/arch/sparc/include/asm/
Dide.h40 u16 *ps = dst; in __ide_insw() local
43 if(((unsigned long)ps) & 0x2) { in __ide_insw()
44 *ps++ = __raw_readw(port); in __ide_insw()
47 pi = (u32 *)ps; in __ide_insw()
56 ps = (u16 *)pi; in __ide_insw()
58 *ps++ = __raw_readw(port); in __ide_insw()
70 const u16 *ps = src; in __ide_outsw() local
74 __raw_writew(*ps++, port); in __ide_outsw()
77 pi = (const u32 *)ps; in __ide_outsw()
86 ps = (const u16 *)pi; in __ide_outsw()
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/arch/sparc/lib/
DPeeCeeI.c120 u16 *ps = dst; in insw() local
123 if (((unsigned long)ps) & 0x2) { in insw()
124 *ps++ = le16_to_cpu(inw(addr)); in insw()
127 pi = (u32 *)ps; in insw()
136 ps = (u16 *)pi; in insw()
138 *ps = le16_to_cpu(inw(addr)); in insw()
154 u16 *ps; in insl() local
159 ps = dst; in insl()
162 *ps++ = l; in insl()
163 pi = (u32 *)ps; in insl()
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/arch/x86/kvm/
Di8254.c196 static int __pit_timer_fn(struct kvm_kpit_state *ps) in __pit_timer_fn() argument
198 struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0]; in __pit_timer_fn()
199 struct kvm_kpit_timer *pt = &ps->pit_timer; in __pit_timer_fn()
210 ps->channels[0].count_load_time = ktime_get(); in __pit_timer_fn()
226 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, in kvm_pit_ack_irq() local
228 spin_lock(&ps->inject_lock); in kvm_pit_ack_irq()
229 if (atomic_dec_return(&ps->pit_timer.pending) < 0) in kvm_pit_ack_irq()
230 atomic_inc(&ps->pit_timer.pending); in kvm_pit_ack_irq()
231 ps->irq_ack = 1; in kvm_pit_ack_irq()
232 spin_unlock(&ps->inject_lock); in kvm_pit_ack_irq()
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/arch/powerpc/boot/
Daddnote.c95 int ph, ps, np; in main() local
128 ps = GET_16BE(E_PHENTSIZE); in main()
130 if (ph < E_HSIZE || ps < PH_HSIZE || np < 1) in main()
132 if (ph + (np + 2) * ps + nnote + nnote2 > n) in main()
141 ph += ps; in main()
145 for (i = 0; i < 2 * ps + nnote + nnote2; ++i) in main()
150 ns = ph + 2 * ps; in main()
166 ph += ps; in main()
/arch/ia64/include/asm/sn/
Dpcibr_provider.h20 #define IS_PCIX(ps) ((ps)->pbi_bridge_mode & BUSTYPE_MASK) argument
23 #define IS_PIC_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_PIC) argument
24 #define IS_TIOCP_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_TIOCP) argument
/arch/arm/common/
Dicst525.c101 unsigned long f, ps; in icst525_ps_to_vco() local
104 ps = 1000000000UL / p->vco_max; in icst525_ps_to_vco()
117 if (f >= ps && f < 100000) in icst525_ps_to_vco()
126 ps = 500000000UL / p->ref; in icst525_ps_to_vco()
137 f_in_div = ps * rd; in icst525_ps_to_vco()
Dicst307.c103 unsigned long f, ps; in icst307_ps_to_vco() local
106 ps = 1000000000UL / p->vco_max; in icst307_ps_to_vco()
118 if (f >= ps && f < 1000000000UL / 6000 + 1) in icst307_ps_to_vco()
127 ps = 500000000UL / p->ref; in icst307_ps_to_vco()
138 f_in_div = ps * rd; in icst307_ps_to_vco()
/arch/xtensa/kernel/
Dptrace.c54 __put_user(regs->ps & ~(1 << PS_EXCM_BIT), &gregset->ps); in ptrace_getregs()
76 unsigned long ps; in ptrace_setregs() local
83 __get_user(ps, &gregset->ps); in ptrace_setregs()
90 regs->ps = (regs->ps & ~ps_mask) | (ps & ps_mask) | (1 << PS_EXCM_BIT); in ptrace_setregs()
181 tmp = (regs->ps & ~(1 << PS_EXCM_BIT)); in ptrace_peekusr()
Dsignal.c147 COPY(ps); in setup_sigcontext()
183 unsigned long ps; in restore_sigcontext() local
205 err |= __get_user(ps, &sc->sc_ps); in restore_sigcontext()
206 regs->ps = (regs->ps & ~PS_CALLINC_MASK) | (ps & PS_CALLINC_MASK); in restore_sigcontext()
Dprocess.c287 elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT)); in xtensa_elf_core_copy_regs()
/arch/alpha/include/asm/
Dptrace.h45 unsigned long ps; member
71 #define user_mode(regs) (((regs)->ps & 8) != 0)
/arch/ia64/sn/pci/
Dtioce_provider.c164 #define ATE_PAGESHIFT(ps) (__ffs(ps)) argument
165 #define ATE_PAGEMASK(ps) ((ps)-1) argument
167 #define ATE_PAGE(x, ps) ((x) >> ATE_PAGESHIFT(ps)) argument
172 #define ATE_MAKE(addr, ps, msi) \ argument
173 (((addr) & ~ATE_PAGEMASK(ps)) | (1UL << 63) | ((msi)?(1UL << 62):0))
703 int ate_index, last_ate, ps; in tioce_reserve_m32() local
707 ps = ce_kern->ce_ate3240_pagesize; in tioce_reserve_m32()
708 ate_index = ATE_PAGE(base, ps); in tioce_reserve_m32()
709 last_ate = ate_index + ATE_NPAGES(base, limit-base+1, ps) - 1; in tioce_reserve_m32()
720 ate = ATE_MAKE(0xdeadbeef, ps, 0); in tioce_reserve_m32()
[all …]
Dtioca_provider.c372 int i, ps, ps_shift, entry, entries, mapsize, last_entry; in tioca_dma_mapped() local
404 ps = tioca_kern->ca_ap_pagesize; /* will be power of 2 */ in tioca_dma_mapped()
405 ps_shift = ffs(ps) - 1; in tioca_dma_mapped()
431 bus_addr = tioca_kern->ca_pciap_base + (entry * ps); in tioca_dma_mapped()
438 if (xio_addr % ps) { in tioca_dma_mapped()
440 bus_addr += xio_addr & (ps - 1); in tioca_dma_mapped()
441 xio_addr &= ~(ps - 1); in tioca_dma_mapped()
442 xio_addr += ps; in tioca_dma_mapped()
448 xio_addr += ps; in tioca_dma_mapped()
/arch/xtensa/include/asm/
Dptrace.h86 unsigned long ps; /* 8 */ member
118 # define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
Dsystem.h196 unsigned int a0, ps; in spill_registers() local
209 :: "a" (&a0), "a" (&ps) in spill_registers()
Dprocessor.h149 regs->ps = USER_PS_VALUE; \
/arch/x86/mm/
Dhugetlbpage.c431 unsigned long ps = memparse(opt, &opt); in setup_hugepagesz() local
432 if (ps == PMD_SIZE) { in setup_hugepagesz()
434 } else if (ps == PUD_SIZE && cpu_has_gbpages) { in setup_hugepagesz()
438 ps >> 20); in setup_hugepagesz()
/arch/alpha/kernel/
Dtraps.c67 regs->pc, regs->r26, regs->ps, print_tainted()); in dik_show_regs()
181 if (regs->ps & 8) in die_if_kernel()
244 if ((regs->ps & ~IPL_MAX) == 0) { in do_entIF()
441 unsigned long ps, pc, gp, a0, a1, a2; member
654 pc, una_reg(26), regs->ps); in do_entUna()
Dsrmcons.c159 srmcons_get_private_struct(struct srmcons_private **ps) in srmcons_get_private_struct() argument
181 *ps = srmconsp; in srmcons_get_private_struct()
/arch/x86/kernel/
Dpci-gart_64.c406 struct scatterlist *s, *ps, *start_sg, *sgmap; in gart_map_sg() local
423 ps = NULL; /* shut up gcc */ in gart_map_sg()
441 (ps->offset + ps->length) % PAGE_SIZE) { in gart_map_sg()
457 ps = s; in gart_map_sg()
/arch/ia64/include/asm/
Dkvm.h130 unsigned long ps : 6; member

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