| /arch/powerpc/mm/ |
| D | hugetlbpage.c | 46 #define PTRS_PER_HUGEPTE(psize) (1 << hugepte_shift[psize]) argument
47 #define HUGEPTE_TABLE_SIZE(psize) (sizeof(pte_t) << hugepte_shift[psize]) argument
49 #define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \ argument
50 + hugepte_shift[psize])
51 #define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize)) argument
52 #define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1)) argument
56 #define HUGE_PGTABLE_INDEX(psize) (HUGEPTE_CACHE_NUM + psize - 1) argument
57 #define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize]) argument
105 int psize = shift_to_mmu_psize(shift); in hugepte_offset() local
106 unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1)); in hugepte_offset()
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| D | hash_native_64.c | 41 static inline void __tlbie(unsigned long va, int psize, int ssize) in __tlbie() argument
48 switch (psize) { in __tlbie()
55 penc = mmu_psize_defs[psize].penc; in __tlbie()
56 va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); in __tlbie()
64 static inline void __tlbiel(unsigned long va, int psize, int ssize) in __tlbiel() argument
71 switch (psize) { in __tlbiel()
79 penc = mmu_psize_defs[psize].penc; in __tlbiel()
80 va &= ~((1ul << mmu_psize_defs[psize].shift) - 1); in __tlbiel()
90 static inline void tlbie(unsigned long va, int psize, int ssize, int local) in tlbie() argument
96 use_local = mmu_psize_defs[psize].tlbiel; in tlbie()
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| D | slice.c | 143 static struct slice_mask slice_mask_for_size(struct mm_struct *mm, int psize) in slice_mask_for_size() argument
151 if (((psizes >> (i * 4)) & 0xf) == psize) in slice_mask_for_size()
156 if (((psizes >> (i * 4)) & 0xf) == psize) in slice_mask_for_size()
184 static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psize) in slice_convert() argument
190 slice_dbg("slice_convert(mm=%p, psize=%d)\n", mm, psize); in slice_convert()
202 (((unsigned long)psize) << (i * 4)); in slice_convert()
208 (((unsigned long)psize) << (i * 4)); in slice_convert()
227 int psize, int use_cache) in slice_find_area_bottomup() argument
232 int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); in slice_find_area_bottomup()
284 int psize, int use_cache) in slice_find_area_topdown() argument
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| D | tlb_hash64.c | 54 unsigned int psize; in hpte_need_flush() local
75 psize = get_slice_psize(mm, addr);; in hpte_need_flush()
78 psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */ in hpte_need_flush()
81 psize = pte_pagesize_index(mm, addr, pte); in hpte_need_flush()
102 flush_hash_page(vaddr, rpte, psize, ssize, 0); in hpte_need_flush()
116 if (i != 0 && (mm != batch->mm || batch->psize != psize || in hpte_need_flush()
123 batch->psize = psize; in hpte_need_flush()
151 batch->psize, batch->ssize, local); in __flush_tlb_pending()
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| D | hash_utils_64.c | 175 int psize, int ssize) in htab_bolt_mapping() argument
181 shift = mmu_psize_defs[psize].shift; in htab_bolt_mapping()
187 vstart, vend, pstart, prot, psize, ssize); in htab_bolt_mapping()
205 HPTE_V_BOLTED, psize, ssize); in htab_bolt_mapping()
219 int psize, int ssize) in htab_remove_mapping() argument
224 shift = mmu_psize_defs[psize].shift; in htab_remove_mapping()
234 ppc_md.hpte_removebolted(vaddr, psize, ssize); in htab_remove_mapping()
863 int psize, ssize; in hash_page() local
882 psize = get_slice_psize(mm, ea); in hash_page()
890 psize = mmu_vmalloc_psize; in hash_page()
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| D | gup.c | 154 int psize, nr = 0; in get_user_pages_fast() local
208 psize = get_slice_psize(mm, addr); in get_user_pages_fast()
209 shift = mmu_psize_defs[psize].shift; in get_user_pages_fast()
212 if (unlikely(mmu_huge_psizes[psize])) { in get_user_pages_fast()
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| /arch/powerpc/platforms/cell/ |
| D | beat_htab.c | 93 int psize, int ssize) in beat_lpar_hpte_insert() argument
105 hpte_group, va, pa, rflags, vflags, psize); in beat_lpar_hpte_insert()
107 hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) | in beat_lpar_hpte_insert()
109 hpte_r = hpte_encode_r(pa, psize) | rflags; in beat_lpar_hpte_insert()
189 int psize, int ssize, int local) in beat_lpar_hpte_updatepp() argument
195 want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); in beat_lpar_hpte_updatepp()
199 want_v & HPTE_V_AVPN, slot, psize, newpp); in beat_lpar_hpte_updatepp()
224 static long beat_lpar_hpte_find(unsigned long va, int psize) in beat_lpar_hpte_find() argument
231 hash = hpt_hash(va, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M); in beat_lpar_hpte_find()
232 want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); in beat_lpar_hpte_find()
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| D | spu_base.c | 170 int psize; in __spu_trap_data_seg() local
179 psize = get_slice_psize(mm, ea); in __spu_trap_data_seg()
181 psize = mm->context.user_psize; in __spu_trap_data_seg()
188 psize = mmu_vmalloc_psize; in __spu_trap_data_seg()
190 psize = mmu_io_psize; in __spu_trap_data_seg()
195 psize = mmu_linear_psize; in __spu_trap_data_seg()
206 slb.vsid |= mmu_psize_defs[psize].sllp; in __spu_trap_data_seg()
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| /arch/powerpc/platforms/pseries/ |
| D | lpar.c | 281 int psize, int ssize) in pSeries_lpar_hpte_insert() argument
291 hpte_group, va, pa, rflags, vflags, psize); in pSeries_lpar_hpte_insert()
293 hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID; in pSeries_lpar_hpte_insert()
294 hpte_r = hpte_encode_r(pa, psize) | rflags; in pSeries_lpar_hpte_insert()
393 static inline unsigned long hpte_encode_avpn(unsigned long va, int psize, in hpte_encode_avpn() argument
398 v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm); in hpte_encode_avpn()
413 int psize, int ssize, int local) in pSeries_lpar_hpte_updatepp() argument
419 want_v = hpte_encode_avpn(va, psize, ssize); in pSeries_lpar_hpte_updatepp()
422 want_v, slot, flags, psize); in pSeries_lpar_hpte_updatepp()
457 static long pSeries_lpar_hpte_find(unsigned long va, int psize, int ssize) in pSeries_lpar_hpte_find() argument
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| /arch/powerpc/include/asm/ |
| D | page_64.h | 121 unsigned int psize,
128 extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
129 extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
131 unsigned long len, unsigned int psize);
139 #define slice_set_user_psize(mm, psize) \ argument
141 (mm)->context.user_psize = (psize); \
142 (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
144 #define slice_set_range_psize(mm, start, len, psize) \ argument
145 slice_set_user_psize((mm), (psize))
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| D | mmu-hash64.h | 207 static inline unsigned long hpte_encode_v(unsigned long va, int psize, in hpte_encode_v() argument
211 v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm); in hpte_encode_v()
213 if (psize != MMU_PAGE_4K) in hpte_encode_v()
224 static inline unsigned long hpte_encode_r(unsigned long pa, int psize) in hpte_encode_r() argument
229 if (psize == MMU_PAGE_4K) in hpte_encode_r()
232 unsigned int penc = mmu_psize_defs[psize].penc; in hpte_encode_r()
233 unsigned int shift = mmu_psize_defs[psize].shift; in hpte_encode_r()
282 int psize, int ssize);
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| D | pgtable-64k.h | 137 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ argument
140 unsigned __split = (psize == MMU_PAGE_4K || \
141 psize == MMU_PAGE_64K_AP); \
142 shift = mmu_psize_defs[psize].shift; \
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| D | machdep.h | 54 int psize, int ssize,
59 int psize, int ssize,
63 int psize, int ssize);
69 int psize, int ssize);
72 int psize, int ssize);
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| D | pgtable-4k.h | 84 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ argument
87 shift = mmu_psize_defs[psize].shift; \
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| D | tlbflush.h | 90 unsigned int psize; member
121 extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
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| /arch/powerpc/platforms/ps3/ |
| D | htab.c | 48 int psize, int ssize) in ps3_hpte_insert() argument
64 hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID; in ps3_hpte_insert()
65 hpte_r = hpte_encode_r(ps3_mm_phys_to_lpar(pa), psize) | rflags; in ps3_hpte_insert()
110 unsigned long va, int psize, int ssize, int local) in ps3_hpte_updatepp() argument
118 want_v = hpte_encode_v(va, psize, ssize); in ps3_hpte_updatepp()
129 __func__, result, va, slot, psize); in ps3_hpte_updatepp()
157 int psize, int ssize) in ps3_hpte_updateboltedpp() argument
163 int psize, int ssize, int local) in ps3_hpte_invalidate() argument
174 __func__, result, va, slot, psize); in ps3_hpte_invalidate()
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| /arch/powerpc/sysdev/bestcomm/ |
| D | sram.c | 44 unsigned int psize; in bcom_sram_init() local
100 reg_addr_p = of_get_property(sram_node, "available", &psize); in bcom_sram_init()
103 psize = 0; in bcom_sram_init()
106 if (!regaddr_p || !psize) { in bcom_sram_init()
111 while (psize >= 2 * sizeof(u32)) { in bcom_sram_init()
115 psize -= 2 * sizeof(u32); in bcom_sram_init()
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| /arch/powerpc/platforms/iseries/ |
| D | htab.c | 44 unsigned long vflags, int psize, int ssize) in iSeries_hpte_insert() argument
50 BUG_ON(psize != MMU_PAGE_4K); in iSeries_hpte_insert()
146 unsigned long va, int psize, int ssize, int local) in iSeries_hpte_updatepp() argument
209 int psize, int ssize) in iSeries_hpte_updateboltedpp() argument
214 BUG_ON(psize != MMU_PAGE_4K); in iSeries_hpte_updateboltedpp()
226 int psize, int ssize, int local) in iSeries_hpte_invalidate() argument
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| /arch/sh/boards/mach-lboxre2/ |
| D | setup.c | 54 unsigned long paddrbase, psize; in lboxre2_devices_setup() local
58 psize = PAGE_SIZE; in lboxre2_devices_setup()
60 cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); in lboxre2_devices_setup()
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| /arch/powerpc/kernel/ |
| D | prom_parse.c | 183 unsigned int psize; in of_get_pci_address() local
203 prop = of_get_property(dev, bus->addresses, &psize); in of_get_pci_address()
206 psize /= 4; in of_get_pci_address()
209 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) in of_get_pci_address()
579 unsigned int psize; in of_get_address() local
595 prop = of_get_property(dev, bus->addresses, &psize); in of_get_address()
598 psize /= 4; in of_get_address()
601 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) in of_get_address()
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| D | pci_32.c | 224 unsigned int psize; in scan_OF_for_pci_dev() local
227 reg = of_get_property(np, "reg", &psize); in scan_OF_for_pci_dev()
228 if (reg == NULL || psize < 4) in scan_OF_for_pci_dev()
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| /arch/x86/mm/ |
| D | pageattr.c | 348 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; in try_preserve_large_page() local
368 psize = PMD_PAGE_SIZE; in try_preserve_large_page()
373 psize = PUD_PAGE_SIZE; in try_preserve_large_page()
386 nextpage_addr = (address + psize) & pmask; in try_preserve_large_page()
404 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); in try_preserve_large_page()
440 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) { in try_preserve_large_page()
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| /arch/blackfin/mm/ |
| D | sram-alloc.c | 297 unsigned long *psize) in _sram_alloc_max() argument
316 *psize = pmax->size; in _sram_alloc_max()
318 return _sram_alloc(*psize, pfree_head, pused_head); in _sram_alloc_max()
617 void *l1sram_alloc_max(size_t *psize) in l1sram_alloc_max() argument
628 &per_cpu(used_l1_ssram_head, cpu), psize); in l1sram_alloc_max()
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| /arch/powerpc/platforms/powermac/ |
| D | cpufreq_64.c | 390 unsigned int psize, ssize; in g5_neo2_cpufreq_init() local
436 g5_pmode_data = of_get_property(cpunode, "power-mode-data",&psize); in g5_neo2_cpufreq_init()
441 g5_pmode_max = psize / sizeof(u32) - 1; in g5_neo2_cpufreq_init()
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| /arch/powerpc/sysdev/ |
| D | mpic.c | 1108 int psize; in mpic_alloc() local
1111 of_get_property(node, "protected-sources", &psize); in mpic_alloc()
1113 psize /= 4; in mpic_alloc()
1119 for (i = 0; i < psize; i++) { in mpic_alloc()
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