| /arch/s390/kernel/ |
| D | mcount.S | 13 stm %r0,%r5,8(%r15)
14 st %r14,56(%r15)
15 lr %r1,%r15
16 ahi %r15,-96
17 l %r3,100(%r15)
19 st %r1,__SF_BACKCHAIN(%r15)
26 ahi %r15,96
27 lm %r0,%r5,8(%r15)
28 l %r14,56(%r15)
39 stmg %r0,%r5,16(%r15)
[all …]
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| D | base.S | 17 0: lg %r15,__LC_PANIC_STACK # load panic stack
18 aghi %r15,-STACK_FRAME_OVERHEAD
25 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
36 stmg %r0,%r15,__LC_SAVE_AREA
38 0: aghi %r15,-STACK_FRAME_OVERHEAD
44 1: lmg %r0,%r15,__LC_SAVE_AREA
56 stmg %r0,%r15,__LC_SAVE_AREA
58 0: aghi %r15,-STACK_FRAME_OVERHEAD
64 lmg %r0,%r15,__LC_SAVE_AREA
83 0: l %r15,__LC_PANIC_STACK # load panic stack
[all …]
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| D | entry64.S | 75 tm SP_PSW(%r15),0x03 # irqs enabled?
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
115 stmg %r12,%r15,\savearea
121 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
128 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
131 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
150 slgr %r14,%r15
153 1: lg %r15,__LC_ASYNC_STACK # load async stack
156 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
164 aghi %r15,-SP_SIZE # make room for registers & psw
[all …]
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| D | entry.S | 77 tm SP_PSW(%r15),0x03 # irqs enabled?
94 tm SP_PSW+1(%r15),0x01 # returning to user ?
126 stm %r12,%r15,\savearea
132 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
139 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
142 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
162 slr %r14,%r15
165 1: l %r15,__LC_ASYNC_STACK
168 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
176 s %r15,BASED(.Lc_spsize) # make room for registers & psw
[all …]
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| D | head31.S | 27 l %r15,.Linittu-.LPG1(%r13)
28 mvc __LC_CURRENT(4),__TI_task(%r15)
29 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
30 st %r15,__LC_KERNEL_STACK # set end of kernel stack
31 ahi %r15,-96
87 stctl %c0,%c15,0(%r15)
88 oi 2(%r15),0x40 # enable sigp emergency signal
89 oi 0(%r15),0x10 # switch on low address protection
90 lctl %c0,%c15,0(%r15)
|
| D | head64.S | 95 larl %r15,init_thread_union
96 lg %r14,__TI_task(%r15) # cache current in lowcore
98 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
99 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
100 aghi %r15,-160
162 stctg %c0,%c15,0(%r15)
163 oi 6(%r15),0x40 # enable sigp emergency signal
164 oi 4(%r15),0x10 # switch on low address proctection
165 lctlg %c0,%c15,0(%r15)
|
| /arch/sh/kernel/cpu/sh2/ |
| D | entry.S | 51 mov.l @(5*4,r15),r3 ! previous SR
55 mov.l r3,@(5*4,r15) ! update SR
64 mov r15,r2 ! r2 = user stack top
65 mov r0,r15 ! switch kernel stack
66 mov.l r1,@-r15 ! TRA
67 sts.l macl, @-r15
68 sts.l mach, @-r15
69 stc.l gbr, @-r15
71 mov.l r0,@-r15 ! original SR
72 sts.l pr,@-r15
[all …]
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| /arch/sh/kernel/cpu/sh3/ |
| D | entry.S | 146 mov r15, r4
157 mov r15, r4
180 mov r15, r4 ! regs
190 mov.l @r15+, r0
191 mov.l @r15+, r1
192 mov.l @r15+, r2
193 mov.l @r15+, r3
194 mov.l @r15+, r4
195 mov.l @r15+, r5
196 mov.l @r15+, r6
[all …]
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| /arch/sh/kernel/cpu/sh2a/ |
| D | entry.S | 50 bst.b #6,@(4*4,r15) !set cpu mode to SR.MD
59 mov r15,r2 ! r2 = user stack top
60 mov r0,r15 ! switch kernel stack
61 mov.l r1,@-r15 ! TRA
62 sts.l macl, @-r15
63 sts.l mach, @-r15
64 stc.l gbr, @-r15
66 mov.l r0,@-r15 ! original SR
67 sts.l pr,@-r15
69 mov.l r0,@-r15 ! original PC
[all …]
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| /arch/sh/lib/ |
| D | mcount.S | 14 mov.l r4, @-r15; \
15 mov.l r5, @-r15; \
16 mov.l r6, @-r15; \
17 mov.l r7, @-r15; \
18 sts.l pr, @-r15; \
20 mov.l @(20,r15),r4; \
24 lds.l @r15+, pr; \
25 mov.l @r15+, r7; \
26 mov.l @r15+, r6; \
27 mov.l @r15+, r5; \
[all …]
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| D | udivsi3_i4i.S | 75 mov.l r4,@-r15
77 mov.l r1,@-r15
88 mov.l r4,@-r15
91 mov.l r5,@-r15
102 mov.l @r15+,r5
106 mov.l @r15+,r4
114 mov.l @r15+,r5
116 mov.l @r15+,r4
129 mov.l r4,@-r15
131 mov.l r1,@-r15
[all …]
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| D | udivsi3_i4i-Os.S | 49 mov.l r4,@-r15
56 mov.l r5,@-r15
73 mov.l @r15+,r5
75 mov.l @r15+,r4
94 mov.l r5,@-r15
102 mov.l @r15+,r5
103 mov.l @r15+,r4
113 mov.l r4,@-r15
115 mov.l r5,@-r15
|
| D | copy_page.S | 27 mov.l r8,@-r15
28 mov.l r10,@-r15
29 mov.l r11,@-r15
65 mov.l @r15+,r11
66 mov.l @r15+,r10
67 mov.l @r15+,r8
97 mov.l r11,@-r15
99 mov.l r10,@-r15
101 mov.l r9,@-r15
103 mov.l r8,@-r15
[all …]
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| D | udivsi3.S | 49 sts.l pr,@-r15
66 lds.l @r15+,pr
85 lds.l @r15+,pr
|
| /arch/x86/crypto/ |
| D | salsa20-x86_64-asm_64.S | 34 # r15_stack = r15
35 movq %r15,32(%rsp)
149 movq 112(%rsp),%r15
151 mov %r15,%rbx
153 shr $32,%r15
155 movq %r15,176(%rsp)
157 mov $20,%r15
161 movq %r15,184(%rsp)
163 movq 160(%rsp),%r15
171 lea (%rdi,%r15),%rbp
[all …]
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| /arch/ia64/lib/ |
| D | ip_fast_csum.S | 38 add r15=4,in0 // second source pointer
43 (p7) ld4 r21=[r15],8
47 ld4 r23=[r15],8
99 dep r15=in3,in2,32,16
103 mux1 r15=r15,@rev
107 shr.u r15=r15,16
120 add r15=r15,in4
122 add r8=r8,r15
|
| /arch/s390/kvm/ |
| D | sie64a.S | 27 stmg %r5,%r14,SP_R5(%r15) # save register on entry
32 lg %r14,SP_R5(%r15)
35 lmg %r6,%r14,SP_R6(%r15)
39 lg %r14,SP_R5(%r15)
42 lmg %r6,%r14,SP_R6(%r15)
|
| /arch/sh/kernel/ |
| D | entry-common.S | 85 mov.l @(r0,r15), r0 ! get status register
215 mov.l @(OFF_R4,r15), r4 ! arg0
216 mov.l @(OFF_R5,r15), r5
217 mov.l @(OFF_R6,r15), r6
218 mov.l @(OFF_R7,r15), r7 ! arg3
219 mov.l @(OFF_R3,r15), r3 ! syscall_nr
226 mov.l r0, @(OFF_R0,r15) ! Return value
241 mov.l r0, @(OFF_R0,r15) ! Return value
313 add r15, r10
|
| /arch/s390/kernel/vdso32/ |
| D | gettimeofday.S | 32 stck 24(%r15) /* Store TOD clock */
33 lm %r0,%r1,24(%r15)
39 st %r0,24(%r15)
45 4: al %r0,24(%r15)
51 5: mvc 24(4,%r15),__VDSO_XTIME_SEC+4(%r5)
54 l %r4,24(%r15) /* get tv_sec from stack */
|
| D | clock_gettime.S | 35 stck 24(%r15) /* Store TOD clock */
36 lm %r0,%r1,24(%r15)
83 stck 24(%r15) /* Store TOD clock */
84 lm %r0,%r1,24(%r15)
|
| /arch/ia64/kernel/ |
| D | gate.S | 75 adds r17=-1024,r15 // A
93 tnat.nz p10,p9=r15 // I0
203 ld8 r15=[base1] // get address of new RBS base (or NULL)
206 cmp.ne p1,p0=r15,r0 // do we need to switch rbs? (note: pr is saved by kernel)
245 ld8 r15=[base0] // fetch sc_ar_bsp
248 cmp.ne p1,p0=r14,r15 // do we need to restore the rbs?
269 mov r15=__NR_rt_sigreturn
283 mov ar.bspstore=r15 // switch over to new register backing store area
293 sub r15=r16,r15
298 shl r15=r15,16
[all …]
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| D | entry.S | 281 adds r15=SW(R5)+16,sp
295 adds r15=SW(R5)+16,sp
298 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
311 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
323 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
328 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
334 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
339 st8 [r15]=r21 // save ar.lc
394 adds r15=SW(AR_FPSR)+16,sp
415 ld8 r19=[r15],24 // restore fpsr
[all …]
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| /arch/sh/kernel/cpu/sh5/ |
| D | switchto.S | 46 sub.l r15, r0, r15
49 st.l r15, 0, r18 ! save link reg
50 st.l r15, 4, r14 ! save fp
51 add.l r15, r63, r14 ! setup frame pointer
55 addi.l r15, 8, r1 ! base of pt_regs
120 st.l r3, 0, r15 ! prev->thread.sp
128 ld.l r5, 0, r15 ! next->thread.sp
140 addi.l r15, 32, r0 ! r0 = next's regs
189 ld.l r15, 0, r18
190 ld.l r15, 4, r14
[all …]
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| /arch/um/sys-x86_64/ |
| D | setjmp.S | 15 # %r15
33 movq %r15,48(%rdi)
51 movq 48(%rdi),%r15
|
| /arch/s390/kernel/vdso64/ |
| D | clock_gettime.S | 36 stck 48(%r15) /* Store TOD clock */
37 lg %r1,48(%r15)
64 stck 48(%r15) /* Store TOD clock */
65 lg %r1,48(%r15)
|