| /arch/m32r/lib/ |
| D | ashxdi3.S | 10 ; input r2 shift val
23 cmpz r2 || ldi r3, #32
24 jc r14 || cmpu r2, r3
28 addi r2, #-32
29 sra r1, r2
33 mv r3, r0 || srl r1, r2
34 sra r0, r2 || neg r2, r2
35 sll r3, r2
43 cmpz r2 || ldi r3, #32
44 jc r14 || cmpu r2, r3
[all …]
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| D | checksum.S | 57 ; r2: unsigned int sum
59 push r2 || ldi r2, #0
66 ldi r3, #0 || addx r2, r4
67 addx r2, r3
80 addx r2, r4 || addi r0, #2
81 addx r2, r3
93 ld r3, @r0+ || addx r2, r3 ; +12
94 ld r4, @r0+ || addx r2, r4 ; +16
95 ld r5, @r0+ || addx r2, r5 ; +20
96 ld r3, @r0+ || addx r2, r3 ; +24
[all …]
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| D | memset.S | 23 mv r4, r0 || cmpz r2
25 cmpui r2, #16
27 cmpui r2, #4
36 addi r2, #-1 || addi r3, #-1
38 cmpui r2, #4
45 or r1, r3 || addi r2, #-4
47 st r1, @+r4 || addi r2, #-4
48 bgtz r2, word_set_loop
49 bnez r2, byte_set_wrap
64 st r1, @+r4 || addi r2, #-16
[all …]
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| D | memcpy.S | 24 or r7, r1 || cmpz r2
25 jc r14 || cmpeq r0, r1 ; return if r2=0
30 srl3 r3, r2, #2
31 and3 r2, r2, #3
36 st r7, @+r4 || cmpz r2
38 addi r4, #4 || jc r14 ; return if r2=0
42 addi r2, #-1 || stb r7, @r4+
43 bnez r2, byte_copy
47 addi r2, #-1 || stb r7, @r4
49 bnez r2, byte_copy
[all …]
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| /arch/s390/kernel/ |
| D | compat_wrapper.S | 12 lgfr %r2,%r2 # int
17 llgfr %r2,%r2 # unsigned int
24 llgfr %r2,%r2 # unsigned int
31 llgtr %r2,%r2 # const char *
38 llgfr %r2,%r2 # unsigned int
43 llgtr %r2,%r2 # const char *
49 llgtr %r2,%r2 # const char *
55 llgtr %r2,%r2 # const char *
60 llgtr %r2,%r2 # const char *
65 llgtr %r2,%r2 # int *
[all …]
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| /arch/ia64/kvm/ |
| D | trampoline.S | 17 add r2 = CTX(B0),r32; \
22 st8 [r2]=r16,16; \
28 st8 [r2]=r16,16; \
34 st8 [r2]=r16; \
42 add r2 = CTX(B0),r33; \
45 ld8 r16=[r2],16; \
51 ld8 r16=[r2],16; \
57 ld8 r16=[r2]; \
71 add r2=CTX(R4),r32; \
75 st8.spill [r2]=r4,16; \
[all …]
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| /arch/arm/lib/ |
| D | findbit.S | 27 mov r2, #0
28 1: ldrb r3, [r0, r2, lsr #3]
31 add r2, r2, #8 @ next bit pointer
32 2: cmp r2, r1 @ any more?
45 ands ip, r2, #7
47 ldrb r3, [r0, r2, lsr #3]
51 orr r2, r2, #7 @ if zero, then no bits here
52 add r2, r2, #1 @ align bit pointer
63 mov r2, #0
64 1: ldrb r3, [r0, r2, lsr #3]
[all …]
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| D | bitops.h | 4 mov r2, #1
7 mov r3, r2, lsl r3
8 1: ldrexb r2, [r1]
9 \instr r2, r2, r3
10 strexb r0, r2, [r1]
18 mov r2, #1
20 mov r3, r2, lsl r3 @ create mask
21 1: ldrexb r2, [r1]
22 ands r0, r2, r3 @ save old value of bit
23 \instr r2, r2, r3 @ toggle bit
[all …]
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| D | memzero.S | 24 strltb r2, [r0], #1 @ 1
25 strleb r2, [r0], #1 @ 1
26 strb r2, [r0], #1 @ 1
34 mov r2, #0 @ 1
50 mov ip, r2 @ 1
51 mov lr, r2 @ 1
54 stmgeia r0!, {r2, r3, ip, lr} @ 4
55 stmgeia r0!, {r2, r3, ip, lr} @ 4
56 stmgeia r0!, {r2, r3, ip, lr} @ 4
57 stmgeia r0!, {r2, r3, ip, lr} @ 4
[all …]
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| D | memset.S | 19 1: subs r2, r2, #4 @ 1 do we have enough
25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
40 cmp r2, #16
53 2: subs r2, r2, #64
63 tst r2, #32
66 tst r2, #16
85 cmp r2, #96
91 sub r2, r2, ip
99 3: subs r2, r2, #64
105 tst r2, #32
[all …]
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| D | io-writesw-armv4.S | 29 sub r2, r2, #1
33 teq r2, #0
40 subs r2, r2, #8
44 subs r2, r2, #8
51 .Lno_outsw_8: tst r2, #4
58 .Lno_outsw_4: movs r2, r2, lsl #31
79 subcs r2, r2, #1
81 subs r2, r2, #2
88 subs r2, r2, #2
93 tst r2, #1
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| D | memmove.S | 32 cmphi r2, ip
36 add r1, r1, r2
37 add r0, r0, r2
38 subs r2, r2, #4
46 1: subs r2, r2, #(28)
51 CALGN( sbcnes r4, ip, r2 ) @ C is always set here
54 CALGN( subs r2, r2, ip ) @ C is set here
59 2: PLD( subs r2, r2, #96 )
67 subs r2, r2, #32
70 PLD( cmn r2, #96 )
[all …]
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| D | io-writesl.S | 14 teq r2, #0 @ do we have to check for the zero len?
19 subs r2, r2, #4
23 subs r2, r2, #4
30 2: movs r2, r2, lsl #31
46 subs r2, r2, #1
54 subs r2, r2, #1
62 subs r2, r2, #1
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| D | io-writesb.S | 34 cmp ip, r2
35 movgt ip, r2
43 subs r2, r2, ip
47 teq r2, #0 @ do we have to check for the zero len?
55 subs r2, r2, #16
63 subs r2, r2, #16
66 tst r2, #15
69 .Loutsb_no_16: tst r2, #8
76 .Loutsb_no_8: tst r2, #4
82 .Loutsb_no_4: ands r2, r2, #3
[all …]
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| /arch/sh/lib/ |
| D | clear_page.S | 67 mov r4, r2
72 add #31, r2
73 and r1, r2
74 cmp/eq r4, r2
76 mov r2, r3
79 mov r4, r2
82 0: mov.b r0, @r2
84 add #1, r2
87 mov r2, r4
92 cmp/hi r2, r3
[all …]
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| /arch/parisc/kernel/ |
| D | syscall.S | 137 STREG %r2, TASK_PT_GR2(%r1) /* preserve rp */
140 LDREGM -FRAME_SIZE(%r30), %r2 /* get users sp back */
142 extrd,u %r2,63,1,%r19 /* W hidden in bottom bit */
144 xor %r19,%r2,%r2 /* clear bottom bit */
149 STREG %r2, TASK_PT_GR30(%r1) /* ... and save it */
174 copy %r19,%r2 /* W bit back to r2 */
193 or,= %r2,%r2,%r2
196 or,= %r2,%r2,%r2
212 ldi __NR_rt_sigreturn,%r2
213 comb,= %r2,%r20,.Lrt_sigreturn
[all …]
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| /arch/sh/lib64/ |
| D | copy_page.S | 49 alloco r2, 0x00
51 alloco r2, 0x20
55 add r2, r6, r6
58 sub r3, r2, r60
70 bge/u r2, r6, tr2 ! skip prefetch for last 4 lines
71 ldx.q r2, r22, r63 ! prefetch 4 lines hence
74 bge/u r2, r7, tr3 ! skip alloco for last 2 lines
75 alloco r2, 0x40 ! alloc destination line 2 lines ahead
78 ldx.q r2, r60, r36
79 ldx.q r2, r61, r37
[all …]
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| D | udivdi3.S | 23 shlri r2,32+14,r19
39 sub r2,r8,r2
42 shlri r2,22,r21
52 sub r2,r5,r2
53 andc r2,r21,r2
56 mulu.l r2,r1,r7
58 addi r2,1,r2
62 sub r2,r3,r2
63 cmpgt r2,r5,r5
64 add r8,r5,r2
[all …]
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| /arch/m32r/mm/ |
| D | mmu.S | 32 st r2, @-sp
49 ;; r2: &tlb_entry_{i|d}_dat
53 seth r2, #high(tlb_entry_d_dat)
54 or3 r2, r2, #low(tlb_entry_d_dat)
57 seth r2, #high(tlb_entry_d_dat)
58 or3 r2, r2, #low(tlb_entry_d_dat)
62 add r2, r1
78 ;; r2: &tlb_entry_{i|d}_dat
86 seth r2, #high(tlb_entry_i_dat)
87 or3 r2, r2, #low(tlb_entry_i_dat)
[all …]
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| /arch/blackfin/mach-bf561/ |
| D | atomic.S | 53 SSYNC(r2);
57 CSYNC(r2);
59 SSYNC(r2);
76 SSYNC(r2);
94 SSYNC(r2);
129 SSYNC(r2);
167 SSYNC(r2);
206 GET_CPUID(p0, r2);
208 r1 <<= r2;
209 r2 = ~r1; define
[all …]
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| /arch/sh/kernel/cpu/sh2/ |
| D | entry.S | 46 mov.l r2,@-sp
49 mov.l $cpu_mode,r2
50 mov.l @r2,r0
58 mov.l r0,@r2 ! enter kernel mode
59 mov.l $current_thread_info,r2
60 mov.l @r2,r2
63 add r2,r0
64 mov r15,r2 ! r2 = user stack top
70 mov.l @(5*4,r2),r0
73 mov.l @(4*4,r2),r0
[all …]
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| /arch/m32r/boot/compressed/ |
| D | head.S | 49 ld r2, @r3
50 add r2, r12
51 st r2, @r3
63 seth r2, #high(__bss_start)
64 or3 r2, r2, #low(__bss_start)
65 add r2, r12
69 sub r3, r2
73 srli r4, #4 || addi r2, #-4
78 ld r0, @(4,r2)
80 st r1, @+r2 || addi r4, #-1
[all …]
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| /arch/arm/boot/compressed/ |
| D | head-shark.S | 33 bic r2, r3, r0
34 eor r2, r2, r1
35 msr cpsr_c, r2
39 add r2, r1, #4
44 adr r2, __mmu_off @ calculate physical address
45 sub r2, r2, #0xf0000000 @ openprom maps us at f000 virt, 0e50 phys
48 add r2, r2, r0
49 add r2, r2, #0x00500000
64 mov pc, r2
104 __Copy: ldr r2, [r0], #-4
[all …]
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| /arch/arm/kernel/ |
| D | iwmmxt.S | 61 mrc p15, 0, r2, c15, c1, 0
62 tst r2, #0x3 @ CP0 and CP1 accessible?
64 orr r2, r2, #0x3 @ enable access to CP0 and CP1
65 mcr p15, 0, r2, c15, c1, 0
69 ldr r2, [sp, #60] @ current task pc value
72 sub r2, r2, #4 @ adjust pc back
73 str r2, [sp, #60]
75 mrc p15, 0, r2, c2, c0, 0
76 mov r2, r2 @ cpwait
84 tmrc r2, wCon
[all …]
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| /arch/arm/mm/ |
| D | proc-macros.S | 132 orr r3, r3, r2
136 and r2, r1, #L_PTE_MT_MASK
137 ldr r2, [ip, r2]
151 orr r3, r3, r2
181 bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits
182 bic r2, r2, #PTE_TYPE_MASK
183 orr r2, r2, #PTE_TYPE_SMALL
186 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
189 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
192 movne r2, #0
[all …]
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